• Title/Summary/Keyword: implementation algorithm

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Performance Improvement of Distributed Consensus Algorithms for Blockchain through Suggestion and Analysis of Assessment Items (평가항목 제안 및 분석을 통한 블록체인 분산합의 알고리즘 성능 개선)

  • Kim, Do Gyun;Choi, Jin Young;Kim, Kiyoung;Oh, Jintae
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.41 no.4
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    • pp.179-188
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    • 2018
  • Recently, blockchain technology has been recognized as one of the most important issues for the 4th Industrial Revolution which can be represented by Artificial Intelligence and Internet of Things. Cryptocurrency, named Bitcoin, was the first successful implementation of blockchain, and it triggered the emergence of various cryptocurrencies. In addition, blockchain technology has been applied to various applications such as finance, healthcare, manufacturing, logistics as well as public services. Distributed consensus algorithm is an essential component in blockchain, and it enables all nodes belonging to blockchain network to make an agreement, which means all nodes have the same information. For example, Bitcoin uses a consensus algorithm called Proof-of-Work (PoW) that gives possession of block generation based on the computational volume committed by nodes. However, energy consumption for block generation in PoW has drastically increased due to the growth of computational performance to prove the possession of block. Although many other distributed consensus algorithms including Proof-of-Stake are suggested, they have their own advantages and limitations, and new research works should be proposed to overcome these limitations. For doing this, above all things, we need to establish an evaluation method existing distributed consensus algorithms. Based on this motivation, in this work, we suggest and analyze assessment items by classifying them as efficiency and safety perspectives for investigating existing distributed consensus algorithms. Furthermore, we suggest new assessment criteria and their implementation methods, which can be used for a baseline for improving performance of existing distributed consensus algorithms and designing new consensus algorithm in future.

Develop physical layer analysis algorithm for OFDMA signal based IEEE 802.16e (IEEE 802.16e 기반 OFDMA 물리층 분석 알고리즘 연구)

  • Jang, Min-Ki
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.6
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    • pp.342-349
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    • 2019
  • We describe and anlayzes the methodology and implementation results of H / W configuration and signal characteristics analysis algorithm for analyzing equipment for analyzing OFDMA physical layer based on 802.16e. Recently, demand for signal analysis of instruments that analyze these signals with the development of digital communication signals is rapidly increasing. Accordingly, it is necessary to develop signal analysis equipment capable of analyzing characteristics of a broadband communication signal using a wideband digital signal processing module. In this paper, we have studied the basic theory of OFDMA in order to devise a device capable of analyzing characterisitcs of broadband communication signals. Second, the structure of OFDMA transmitter/receiver was examined. Third, a wideband digitizer was implemented. we design Wimax signal analysis algorithm based on OFDMA among broadband communication methods and propose Wimax physical layer analysis S/W implementation through I, Q signals. The IF downconverter used the receiver module and the LO generation module of the spectrum analyzer. Quantitative analysis result is obtained through the algorithm of Wimax signal analysis by I, Q data.

Formal Description and Reference Implementation Code Generation for a Security Algorithm using VDM-SL (VDM-SL을 이용한 보안 알고리즘의 형식적 표현과 참조구현 코드 생성)

  • Kim, Young-Gil;Kim, Ki-Su;Kim, Young-Wha;Ryou, Jae-Cheol;Jang, Chung-Ryong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.6 no.4
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    • pp.67-84
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    • 1996
  • VDL-SL (Vienna Development Method-Specification Language) is one of the FSL(Formal Specification Language) which is being presented for the correct description of the security relevant standards. Several tools are being developed for the correctness and the convenience in the description and executable code generation of security relevant standards using VDM-SL. The IFAD VDM-SL Toolbox is one that has many functions : syntax checking, type checking, c++ code generation, test coverage information. This paper describes a formal method for description and implementation of MD4 algorithm using VDM-SL and IFAD VDM-SL Toolbox, and examines the result applied to secure hash algorithm, and proposes the relation to strict conformance test which recently suggested as a security test method.

Implementation of RSA Exponentiator Based on Radix-$2^k$ Modular Multiplication Algorithm (Radix-$2^k$ 모듈라 곱셈 알고리즘 기반의 RSA 지수승 연산기 설계)

  • 권택원;최준림
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.2
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    • pp.35-44
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    • 2002
  • In this paper, an implementation method of RSA exponentiator based on Radix-$2^k$ modular multiplication algorithm is presented and verified. We use Booth receding algorithm to implement Radix-$2^k$ modular multiplication and implement radix-16 modular multiplier using 2K-byte memory and CSA(carry-save adder) array - with two full adder and three half adder delays. For high speed final addition we use a reduced carry generation and propagation scheme called pseudo carry look-ahead adder. Furthermore, the optimum value of the radix is presented through the trade-off between the operating frequency and the throughput for given Silicon technology. We have verified 1,024-bit RSA processor using Altera FPGA EP2K1500E device and Samsung 0.3$\mu\textrm{m}$ technology. In case of the radix-16 modular multiplication algorithm, (n+4+1)/4 clock cycles are needed and the 1,024-bit modular exponentiation is performed in 5.38ms at 50MHz.

Optimization of LEA Quantum Circuits to Apply Grover's Algorithm (그루버 알고리즘 적용을 위한 LEA 양자 회로 최적화)

  • Jang, Kyung Bae;Kim, Hyun Jun;Park, Jae Hoon;Song, Gyeung Ju;Seo, Hwa Jeong
    • KIPS Transactions on Computer and Communication Systems
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    • v.10 no.4
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    • pp.101-106
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    • 2021
  • Quantum algorithms and quantum computers can break the security of many of the ciphers we currently use. If Grover's algorithm is applied to a symmetric key cipher with n-bit security level, the security level can be lowered to (n/2)-bit. In order to apply Grover's algorithm, it is most important to optimize the target cipher as a quantum circuit because the symmetric key cipher must be implemented as a quantum circuit in the oracle function. Accordingly, researches on implementing AES(Advanced Encryption Standard) or lightweight block ciphers as quantum circuits have been actively conducted in recent years. In this paper, korean lightweight block cipher LEA was optimized and implemented as a quantum circuit. Compared to the previous LEA quantum circuit implementation, quantum gates were used more, but qubits were drastically reduced, and performance evaluation was performed for this tradeoff problem. Finally, we evaluated quantum resources for applying Grover's algorithm to the proposed LEA implementation.

Optimized hardware implementation of CIE1931 color gamut control algorithms for FPGA-based performance improvement (FPGA 기반 성능 개선을 위한 CIE1931 색역 변환 알고리즘의 최적화된 하드웨어 구현)

  • Kim, Dae-Woon;Kang, Bong-Soon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.6
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    • pp.813-818
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    • 2021
  • This paper proposes an optimized hardware implementation method for existing CIE1931 color gamut control algorithm. Among the post-processing methods of dehazing algorithms, existing algorithm with relatively low computations have the disadvantage of consuming many hardware resources by calculating large bits using Split multiplier in the computation process. The proposed algorithm achieves computational reduction and hardware miniaturization by reducing the predefined two matrix multiplication operations of the existing algorithm to one. And by optimizing the Split multiplier computation, it is implemented more efficient hardware to mount. The hardware was designed in the Verilog HDL language, and the results of logical synthesis using the Xilinx Vivado program were compared to verify real-time processing performance in 4K environments. Furthermore, this paper verifies the performance of the proposed hardware with mounting results on two FPGAs.

Implementation of Crime Prediction Algorithm based on Crime Influential Factors (범죄발생 요인 분석 기반 범죄예측 알고리즘 구현)

  • Park, Ji Ho;Cha, Gyeong Hyeon;Kim, Kyung Ho;Lee, Dong Chang;Son, Ki Jun;Kim, Jin Young
    • Journal of Satellite, Information and Communications
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    • v.10 no.2
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    • pp.40-45
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    • 2015
  • In this paper, we proposed and implemented a crime prediction algorithm based upon crime influential factors. To collect the crime-related big data, we used a data which had been collected and was published in the supreme prosecutors' office. The algorithm analyzed various crime patterns in Seoul from 2011 to 2013 using the spatial statistics analysis. Also, for the crime prediction algorithm, we adopted a Bayesian network. The Bayesian network consist of various spatial, populational and social characteristics. In addition, for the more precise prediction, we also considered date, time, and weather factors. As the result of the proposed algorithm, we could figure out the different crime patterns in Seoul, and confirmed the prediction accuracy of the proposed algorithm.

Implementation of Self-Adaptative System using Algorithm of Neural Network Learning Gain (신경회로망 학습이득 알고리즘을 이용한 자율적응 시스템 구현)

  • Lee, Sung-Su
    • Proceedings of the KIEE Conference
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    • 2006.07d
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    • pp.1868-1870
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    • 2006
  • Neural network is used in many fields of control systems, but input-output patterns of a control system are not easy to be obtained and by using as single feedback neural network controller. And also it is difficult to get a satisfied performance when the changes of rapid load and disturbance are applied. To resolve those problems, this paper proposes a new algorithm which is the neural network controller. The new algorithm uses the neural network instead of activation function to control object at the output node. Therefore, control object is composed of neural network controller unifying activation function, and it supplies the error back propagation path to calculate the error at the output node. As a result, the input-output pattern problem of the controller which is resigned by the simple structure of neural network is solved, and real-time learning can be possible in general back propagation algorithm. Application of the new algorithm of neural network controller gives excellent performance for initial and tracking response and it shows the robust performance for rapid load change and disturbance. The proposed control algorithm is implemented on a high speed DSP, TMS320C32, for the speed of 3-phase induction motor. Enhanced performance is shown in the test of the speed control.

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A Study on the Development of FRBR Algorithm for KORMARC Bibliographic Record (KORMARC 서지레코드의 FRBR 알고리즘 개발에 관한 연구)

  • Kim, Jeong-Hyen;Lee, Sung-Sook;Lee, You-Jeong
    • Journal of Korean Library and Information Science Society
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    • v.46 no.1
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    • pp.1-23
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    • 2015
  • The purpose of this paper is to development an algorithm for FRBR implementation(functional requirements for bibliographic records), analyzing KORMARC bibliographic records by work types. For this purpose, it was utilized analyzing home and foreign case studies including OCLC and LC's algorithm. Analyzing the experimental data from the Korean National Library's bibliographic records, it was extracted from identifying elements by FRBR's four bibliographic entities. To cluster a related works by work-set, the algorithm was designed to construct the authorized access points as a combination of an author name and a title from the record. I suggested that it should be wholly improved a quality of existing bibliographic records and level of data input to development a FRBR algorithm in Korean libraries.

Dynamic Contention Window Control Algorithm Using Genetic Algorithm in IEEE 802.11 Wireless LAN Systems for Logistics Information Systems (물류 정보시스템을 위한 IEEE 802.11 무선랜 시스템에서 유전자 알고리듬을 이용한 Dynamic Contention Window 제어 알고리듬)

  • Lee, Sang-Heon;Choi, Woo-Yong;Lee, Sang-Wan
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.32 no.3
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    • pp.10-19
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    • 2009
  • Wireless LAN systems have been widely implemented for supporting the wireless internet services especially in the hotspot areas such as hospitals, homes, conference rooms, and so on. Compared with wired LAN systems, wireless LAN systems have the advantages of the users' mobility support and low implementation and maintenance costs. IEEE 802.11 wireless LAN systems employ the backoff algorithm to avoid contentions among STAs when two or more STAs attempt to transmit their data frames simultaneously. The MAC efficiency can be improved if the CW values are adaptively changed according to the channel state of IEEE 802.11 wireless LANs. In this paper, a dynamic contention window control algorithm is proposed using the genetic algorithm to improve the MAC throughput of IEEE 802.11 wireless LANs.