• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.5 s.335
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• pp.55-62
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• 2005

In this paper, we propose an efficient symbol detection algorithm for space-frequency OFDM (SF-OFDM) transmit diversity scheme and present the implementation results of the SF-OFDM WLAN baseband processor with the proposed algorithm. When the number of sub-carriers in SF-OFDM scheme is small, the interference between adjacent sub-carriers may be generated. The proposed algorithm eliminates this interference in a parallel manner and obtains a considerable performance improvement over the conventional detection algorithm. The bit error rate (BER) performance of the proposed detection algorithm is evaluated by the simulation. In the case of 2 transmit and 2 receive antennas, at $BER=10^{-4}$ the proposed algorithm obtains about 3 dB gain over the conventional detection algorithm. The packet error rate (PER), link throughput, and coverage performance of the SF-OFDM WLAN with the proposed detection algorithm are also estimated. For the target throughput at $80\%$ of the peak data rate, the SF-OFDM WLAN achieves the average SNR gain of about 5.95 dB and the average coverage gain of 3.98 meter. The SF-OFDM WLAN baseband processor with the proposed algorithm was designed in a hardware description language and synthesized to gate-level circuits using 0.18um 1.8V CMOS standard cell library. With the division-free architecture, the total logic gate count for the processor is 945K. The real-time operation is verified and evaluated using a FPGA test system.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.9
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• pp.12-19
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• 2002

Guaranteed Frame Rate(GFR) service is intended to efficiently support TCP/IP traffic in ATM networks. The GFR service not only guarantees a minimum service rate at the frame level, but also supports a fair share of available bandwidth. The original GFR proposal outlined two switch implementation scheme : FIFO Queuing and perVC-Queuing. In general, it has been shown that FIFO Queuing is not sufficient to provide rate guarantees and perVC-Queuing with scheduling is needed. In perVC-Queuing implementation, scheduling algorithm plays key rule to provide rate guarantees and to improve fairness. We proposed a new scheduling algorithm for the GFR service. Proposed algorithm can provide minimum service rate guarantee and fair sharing to GFR VCs. Computer simulation results show that proposed scheduling scheme provide a much better performance in TCP Goodput and fairness than previous scheme.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.8
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• pp.14-25
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• 2002

In this paper, we propose a modified AFC algorithm which is suitable for the implementation of WCDMA reverse link receiver modem. To reduce the complexity, the modified CP-FDD algorithm named 'Normalized CP-FDD' is applied to the AFC loop. The proposed FDD algorithm overcomes the conventional CP-FDD's sensitivity to the variance of input signal amplitude and increases the linear range of S -curve. Therefore, offset frequency estimation using the proposed scheme can be more stable than the conventional method. Unlike IS-95, since pilot symbol in WCDMA is not transmitted continuously, we introduce a moving average filter at the FDD input to increase the number of cross-product. So, tracking speed and stability are improved. For more rapid frequency acquisition and tracking, we adopt a multi-stage tracking mode. Using NCO having ROM table structure, the frequency offset is compensated. We applied the proposed algorithm in the implementation of WCDMA base station modem successfully.

• Journal of Internet Computing and Services
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• v.17 no.4
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• pp.43-50
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• 2016

In this paper, we propose the protocol of Ethernet that will receive a popular interesting in the automotive intelligent network, it also attempts to implementation and verification through simulation and experiments to propose a fault tolerance algorithm when the data transfer on it. It has proven the usefulness of the system in order to apply toward an existing automotive communication system. In the case of actual real-time data for automotive industry, we generated a randomly-generated data which is the set of payload into a standard format to complete the experiment. Among the implemented existing algorithms performance, we confirmed the effectiveness of all range from a single data to mixed (Hybrid-type) data, to verify the proposed algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.7
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• pp.1267-1275
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• 2017

This paper describes a design of cryptographic processor supporting 233-bit elliptic curves over binary field defined by NIST. Scalar point multiplication that is core arithmetic in elliptic curve cryptography(ECC) was implemented by adopting modified Montgomery ladder algorithm, making it robust against simple power analysis attack. Point addition and point doubling operations on elliptic curve were implemented by finite field multiplication, squaring, and division operations over $GF(2^{233})$, which is based on affine coordinates. Finite field multiplier and divider were implemented by applying shift-and-add algorithm and extended Euclidean algorithm, respectively, resulting in reduced gate counts. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 49,271 gate equivalents (GEs), and the estimated maximum clock frequency is 345 MHz. One scalar point multiplication takes 490,699 clock cycles, and the computation time is 1.4 msec at the maximum clock frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5A
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• pp.503-509
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• 2007

Low-power motion estimation is required for video coding in portable information devices. In this paper, we propose a low-power motion estimation algorithm and 1-D systolic may VLSI architecture using full search block matching algorithm (FSBMA). Main power dissipation sources of FSBMA are complex computations and frequent memory accesses for data in the search area. In the proposed algorithm, memory accesses and computations are reduced by using 1D PE (processing array) array architecture performing motion estimation of two neighboring blocks in parallel and by skipping unnecessary computations during motion estimation. The VLSI implementation results of the algorithm show that the proposed VLSI architecture can save 9.3% power dissipation and can operate two times faster than an existing low-power motion estimator.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.76-84
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• 2014

As the number of high-density videos increase, parallel processing approaches are necessary to process a large-scale of video data. When a processing method of video data requires thousands of simple operations, GPU-based parallel processing is preferred to CPU-based parallel processing by way of reducing the time and space complexities of a given computation problem. This paper studies the parallel design and implementation of a shot-boundary detection algorithm. The proposed shot-boundary detection algorithm uses pixel brightness comparisons and global histogram data among the blocks of frames, and the computation of these data is characterized with the high parallelism for the related operations. In order to maximize these operations in parallel, the computations of the pixel brightness and histogram are designed in parallel and implemented in NVIDIA GPU. The GPU-based shot detection method is tested with 10 videos from the set of videos in National Archive of Korea. In experiments, the detection rate is similar but the computation time is about 10 time faster to that of the CPU-based algorithm.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.4
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• pp.621-628
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• 2017

The efficiency of implementation of the arithmetic operations in finite fields depends on the choice representation of elements of the field. It seems that from this point of view normal bases are the most appropriate, since raising to the power 2 in $GF(2^n)$ of characteristic 2 is reduced in these bases to a cyclic shift of the coordinates. We, in this paper, introduce our algorithm to transform fastly the conventional bases to normal bases and present the result of H/W implementation using the algorithm. We also propose our algorithm to calculate the multiplication and inverse of elements with respect to normal bases in $GF(2^n)$ and present the programs and the results of H/W implementations using the algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.473-478
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• 2008

WAVE is a short-to-medium range communication standard that supports both public safety and private operations in roadside-to-vehicle and vehicle-to-vehicle communication environments. The core technology of physical layer in WAVE is orthogonal frequency division multiplexing (OFDM), which is sensitive to timing synchronization error. Besides, minimizing the latency in communication link is an essential characteristic of WAVE system. In this paper, a robust, low-complexity and small-latency timing synchronization algorithm suitable for WAVE system and its efficient hardware architecture are proposed. The comparison between proposed algorithm and other algorithms in terms of computational complexity and latency has shown the advantage of the proposed algorithm. The proposed architecture does not require RAM (Random Access Memory) which can affect the pipe lining ability and high speed operation of the hardware implementation. Synchronization error rate (SER) evaluation using both Matlab and FPGA implementation shows that the proposed algorithm exhibits a good performance over the existing algorithms.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.6
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• pp.199-206
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• 2012

Attempt to use as a marker of natural objects directly in the real world, but there is a way to use the accelerometer of the smartphone, to convert the Frontal-View virtual, because it asks only the pitch of the camera, from the side there is a drawback that can not be converted to images. The proposed algorithm, to obtain the rotation matrix of axis 3 pitch, roll, yaw, we set the reference point of the yaw of the target image. Then, to compensate for the rotation matrix to determine Myon'inji any floor, wall, the ceiling of the target image. Finally, to obtain the homography matrix for obtaining the Frontal-View to account for the difference between the gyro sensor coordinate system and image coordinate system, so we can get the Frontal-View from the captured images through the projection transformation was designed. Was tested to convert Frontal-View the picture was taken in an environment smartphone environment surrounding floor, walls and ceiling in order to evaluate the conversion program Frontal-View has been implemented, in this paper, design and The conversion algorithm implementation, it was confirmed that to convert a regular basis Frontal-View footage taken from multiple angles.