• Title/Summary/Keyword: implementation algorithm

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A Robust Algorithm for On-line Economic Dispatch (온라인 발전계획을 위한 강건한 경제급전 알고리즘)

  • Song, Kyung-Bin;Han, Seung-Soo
    • Proceedings of the KIEE Conference
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    • 1998.07c
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    • pp.1111-1113
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    • 1998
  • A robust economic dispatch algorithm involving transmission losses is proposed and investigated for a possibility of on-line applications. In this paper, the penalty factors are calculated directly from transposed Jacobian of load flow analysis with advantages of superiority to B-coefficients method based on its computation time and suitability for real time application since the approach is based on a current system condition. The proposed algorithm is systematically handling the generation capacity constraints with transmission losses. Implementation of the algorithm for IEEE systems and EPRI Scenario systems shows that computation time is enough to apply on-line economic dispatch to large power system and production cost is saved compared with the crude classical economic dispatch algorithm without considering transmission losses.

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An FPGA Design of High-Speed Turbo Decoder

  • Jung Ji-Won;Jung Jin-Hee;Choi Duk-Gun;Lee In-Ki
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6C
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    • pp.450-456
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    • 2005
  • In this paper, we propose a high-speed turbo decoding algorithm and present results of its implementation. The latency caused by (de)interleaving and iterative decoding in conventional MAP turbo decoder can be dramatically reduced with the proposed scheme. The main cause of the time reduction is to use radix-4, center to top, and parallel decoding algorithm. The reduced latency makes it possible to use turbo decoder as a FEC scheme in the real-time wireless communication services. However the proposed scheme costs slight degradation in BER performance because the effective interleaver size in radix-4 is reduced to an half of that in conventional method. To ensure the time reduction, we implemented the proposed scheme on a FPGA chip and compared with conventional one in terms of decoding speed. The decoding speed of the proposed scheme is faster than conventional one at least by 5 times for a single iteration of turbo decoding.

Analysis of Dynamic Multiple-Crack Propagation Problem by Element free-Galerkin Method (무요소법을 이용한 다수균열 함유부재의 동적균열전파해석에 관한 연구)

  • 이상호;김효진
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • 2000.10a
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    • pp.315-322
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    • 2000
  • In this study, an algorithm analyzing dynamic mutiple-crack propagation problem by Meshfree Method is proposed. A short description of Meshfree Method especially, Element-free Galerkin (EFG) method is presented and the elastodynamic fracture theory is summarized. A numerical implementation algorithm for dynamic analysis by Meshfree Method is discussed and an algorithm for mutlple-crack dynamic propagation is also presented. A couple of numerical examples of dynamic crack propagation problem illustrate the performance of the proposed technique. The accuracy of the algorithm is studied in the first example by being compared with experimental results, and the applicability and efficiency of the developed algorithm is studied in the second example.

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Parallel Genetic Algorithm for Structural Optimization on a Cluster of Personal Computers (구조최적화를 위한 병렬유전자 알고리즘)

  • 이준호;박효선
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • 2000.10a
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    • pp.40-47
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    • 2000
  • One of the drawbacks of GA-based structural optimization is that the fitness evaluation of a population of hundreds of individuals requiring hundreds of structural analyses at each CA generation is computational too expensive. Therefore, a parallel genetic algorithm is developed for structural optimization on a cluster of personal computers in this paper. Based on the parallel genetic algorithm, a population at every generation is partitioned into a number of sub-populations equal to the number of slave computers. Parallelism is exploited at sub-population level by allocationg each sub-population to a slave computer. Thus, fitness of a population at each generation can be concurrently evaluated on a cluster of personal computers. For implementation of the algorithm a virtual distributed computing system in a collection of personal computers connected via a 100 Mb/s Ethernet LAN. The algorithm is applied to the minimum weight design of a steel structure. The results show that the computational time requied for serial GA-based structural optimization process is drastically reduced.

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Relay node selection algorithm consuming minimum power of MIMO integrated MANET

  • Chowdhuri, Swati;Banerjee, Pranab;Chaudhuri, Sheli Sinha
    • Advances in Computational Design
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    • v.3 no.2
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    • pp.191-200
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    • 2018
  • Establishment of an efficient routing technique in multiple-input-multiple-output (MIMO) based mobile ad hoc network (MANET) is a new challenge in wireless communication system to communicate in a complex terrain where permanent infrastructure network implementation is not possible. Due to limited power of mobile nodes, a minimum power consumed routing (MPCR) algorithm is developed which is an integration of cooperative transmission process. This algorithm select relay node and support short distance communication. The performance analysis of proposed routing algorithm increased signal to noise interference ratio (SNIR) resulting effect of cooperative transmission. Finally performance analysis of the proposed algorithm is verified with simulated result.

An Improved Implementation of Block Matching Algorithm on a VLIW-based DSP (VLIW 기반 DSP에서의 개선된 블록매칭 알고리즘 구현)

  • You, Hui-Jae;Chung, Sun-Tae;Jung, Sou-Hwan
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.225-226
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    • 2007
  • In this paper, we present our study about the optimization of the block matching algorithm on a VLIW based DSP. The block matching algorithm is well known for its computational burden in motion picture encoding. As supposed to the previous researches where the optimization is achieved by optimizing SAD, the most heavy routine of the block matching, we optimize the block matching algorithm by applying software pipelining technique to the whole routine of the algorithm. Through experiments, the efficiency of the proposed optimization is verified.

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Implementation of Simulated Annealing for Distribution System Loss Minimum Reconfiguration (배전 계토의 손실 최소 재구성을 위한 시뮬레이티드 어닐링의 구현)

  • Jeon, Young-Jae;Choi, Seung-Kyo;Kim, Jae-Chul
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.4
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    • pp.371-378
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    • 1999
  • This paper presents an efficient algorithm for loss reduction of distribution system by automatic sectionalizing switch operation in large scale distribution systems of radial type. Simulated Annealing algorithm among optimization techniques can avoid escape from local minima by accepting improvements in cost, but the use of this algorithm is also responsible for an excessive computation time requirement. To overcome this major limitation of Simulated Annealing algorithm, we may use advanced Simulated Annealing algorithm. All constaints are divided into two constraint group by using perturbation mechanism and penalty factor, so all trail solutions are feasible. The polynomial-time cooling schedule is used which is based on the statistics calculation during the search. This approaches results in saving CPU time. Numerical examples demonstrate the validity and effectiveness of the proposed methodology.

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Block Matching Algorithm Using Sub-blocks (서브블록을 이용한 블록 정합 알고리즘)

  • Kim, Seong-Hee;Oh, Jeong-Su
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.655-658
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    • 2005
  • This paper proposes a modified block matching algorithm which reduces an amount of matching computation by using only pixels contributing greatly to block matching. In consideration of algorithm implementation and additional information, the proposed algorithm divides a matching block into sub-blocks, selects some sub-blocks using their complexities, and execute the block mating with them. Simulation results show that the proposed algorithm performs a valid block matching with some sub-blocks.

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Block Matching Algorithm Using Pixels Selected by Image Complexity (영상 복잡도에 따라 선택된 화소들을 이용한 블록 정합 알고리즘)

  • Kim Seong-hee;Oh Jeong-su
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.8
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    • pp.1703-1708
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    • 2005
  • This paper proposes a modified block matching algorithm which reduces an amount of matching computation by using only pixels contributing greatly to block matching. In consideration of algorithm implementation and additional informatirm, the proposed algorithm divides a matching block into sub-blocks, selects some sub-blocks using their complexities, and execute the block mating with them. Simulation results show that the proposed algorithm performs a valid block matching, diminishing computation cost.

A Sweeping Algorithm for an Autonomous Mobile Robot under the Unknown Environment (미지 환경에서의 자율주행 로봇의 청소 알고리즘)

  • Park, Ju-Yong;Lee, Gi-Dong
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.1
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    • pp.61-67
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    • 1999
  • There has been an ever increasing interest in mobile robot for home services. However, issues currently being investigated for path planning of the mobile robot is concentrated to solving the problem of finding the optimal path from the initial location to the final location under the given performance index. In this study, we newly present a sweeping algorithm for autonomous mobile robot to cover the whole closed area under the unknown environment. And we verify the validity the validity of the formalized algorithm by computer simulation with the changing environment conditions. In addition to this, we analyse the effect of real system implementation of the proposed algorithm to a experimental miniature mobile robit(Khepera).

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