• Title/Summary/Keyword: implementation algorithm

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A study on the Recognition of Continuous Digits using Syntactic Analysis and One-Stage DP (구문 분석과 One-Stage DP를 이용한 연속 숫자음 인식에 관한 연구)

  • Ann, Tae-Ock
    • The Journal of the Acoustical Society of Korea
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    • v.14 no.3
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    • pp.97-104
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    • 1995
  • This paper is a study on the recognition of continuous digits for the implementation of a voice dialing system, and proposes an method of speech recognition using syntactic analysis and One-Stage DP. In order to perform the speech recognition, first of all, we make DMS model by section division algorithm and let continuous digits data be recognized through the proposed One-Stage DP method using syntactic analysis. In this study, 7 continuous digits of 21 kinds which is pronounced by 8 male speakers two or three times, are used. The speaker dependent and speaker independent recognition are performed with the above data by way of the conventional One-Stage DP and the proposed One-Stage DP using syntactic analysis under the condition of laboratory environment. From the recognition experiments, it is shown that the proposed method was better than the established method. And, the recognition accuracy of speaker dependence and independence by the proposed One-Stage DP using syntactic analysis was about 91.7% and 89.7%.

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Design and Implementation of Synchronization Unit for AeroMACS System (AeroMACS 시스템을 위한 동기화기 설계)

  • Jang, Soohyun;Lee, Eunsang;Jung, Yunho
    • Journal of Advanced Navigation Technology
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    • v.18 no.2
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    • pp.142-150
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    • 2014
  • In this paper, the performance analysis results of time/frequency synchronization and cell search algorithm are presented for aeronautical mobile airport communication systems (AeroMACS). AeroMACS is based on IEEE 802.16e mobile WiMAX standard and uses the aeronautical frequency band of 5GHz with the bandwidth of 5MHz. The simulation model of AeroMACS is designed and the performance evaluation is conducted with the various airport channel models such as apron (APR), runway (RWY), taxiway (TWY), and park (PRK). The proposed synchronization unit was designed in hardware description language (HDL) and implemented on FPGA. Also, the real-time operation was verified and evaluated using FPGA test system.

Design of Time Synchronizer for Advanced LR-WPAN Systems (개선된 LR-WPAN 시스템을 위한 시간 동기부 설계)

  • Park, Mincheol;Lee, Dongchan;Jang, Soohyun;Jung, Yunho
    • Journal of Advanced Navigation Technology
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    • v.18 no.5
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    • pp.476-482
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    • 2014
  • Recently, with the growth of various sensor applications, the need of wireless communication systems which can support variable data rate is increasing. IEEE 802.15.4 LR-WPAN system using 2.45 GHz frequency band is very popular for the sensor applications. However, since LR-WPAN only supports the data rate of 250 kbps, it has a limit to be applied to various sensor networks. Therefore, we define the preamble structure which can support the data rates of 31.25 kbps, 62.5 kbps, 125 kbps, and present the low-complexity hardware architecture for time synchronizer based on double-correlation algorithm which can resist the CFO (carrier frequency offset). Implementation results show that the proposed time synchronizer include the logic slice of 18.36 K and four DSP48s, which are reduced at the rate of 79.1% and 99.4%, respectively, compared with existing architecture.

An Analysis of a Structure and Implementation of Error-Detection Tool of Cryptography API-Next Generation(CNG) in Microsoft (마이크로소프트의 차세대 암호 라이브러리 구조에 관한 연구 및 오류-검출 도구 구현)

  • Lee, Kyungroul;You, Ilsun;Yim, Kangbin
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.26 no.1
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    • pp.153-168
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    • 2016
  • This paper introduces a structure, features and programming techniques for the CNG(Cryptography API: Next Generation), which is the substitution of the CAPI(Cryptography API) from Microsoft. The CNG allows to optimize a scope of functions and features because it is comprised of independent modules based on plug-in structure. Therefore, the CNG is competitive on development costs and agility to extend. In addition, the CNG supports various functions for the newest cryptographic algorithm, audit, kernel-mode programming with agility and possible to contribute for core cryptography services in a new environment. Therefore, based on these advantageous functions, we analyze the structure of CNG to extend it for the enterprise and the public office. In addition, we implement an error-detection tool for program which utilizes CNG library.

VMProtect Operation Principle Analysis and Automatic Deobfuscation Implementation (VMProtect 동작원리 분석 및 자동 역난독화 구현)

  • Bang, Cheol-ho;Suk, Jae Hyuk;Lee, Sang-jin
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.30 no.4
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    • pp.605-616
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    • 2020
  • Obfuscation technology delays the analysis of a program by modifying internal logic such as data structure and control flow while maintaining the program's functionality. However, the application of such obfuscation technology to malicious code frequently occurs to reduce the detection rate of malware in antivirus software. The obfuscation technology applied to protect software intellectual property is applied to the malicious code in reverse, which not only lowers the detection rate of the malicious code but also makes it difficult to analyze and thus makes it difficult to identify the functionality of the malicious code. The study of reverse obfuscation techniques that can be closely restored should also continue. This paper analyzes the characteristics of obfuscated code with the option of Pack the Output File and Import Protection among detailed obfuscation technologies provided by VMProtect 3.4.0, a popular tool among commercial obfuscation tools. We present a de-obfuscation algorithm.

A Design and Implementation of Virtual Grid for Reducing Frequency of Continuous Query on LBSNS (LBSNS에서 연속 질의 빈도 감소를 위한 가상그리드 기법의 설계 및 구현)

  • Lee, Eun-Sik;Cho, Dae-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.4
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    • pp.752-758
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    • 2012
  • SNS(Social Networking Services) is oneline service that enable users to construct human network through their relation on web, such as following relation, friend relation, and etc. Recently, owing to the advent of digital devices (smart phone, tablet PC) which embedded GPS some applications which provide services with spatial relevance and social relevance have been released. Such an online service is called LBSNS. It is required to use spatial filtering so as to build the LBSNS system that enable users to subscribe information of interesting area. For spatial filtering, user and tweet attaches location information which divide into static property presenting fixed area and dynamic property presenting user's area changed along the moving user. In the case of using a location information including dynamic property, Continuous query occurred from the moving user causes the problem in server. In this paper, we propose spatial filtering algorithm using Virtual Grid for reducing frequency of query, and conclude that frequency of query on using Virtual Grid is 93% decreased than frequency of query on not using Virtual Grid.

CPUSim: A Simulator supporting the education of CPU Scheduling Algorithms (CPUSim: CPU 스케줄링 알고리즘 교육을 지원하는 시뮬레이터)

  • Koh, Jeong-Gook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.4
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    • pp.835-842
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    • 2012
  • Operating Systems is a discipline which handles abstract concepts and techniques. However, most of OS courses have been textbook-oriented theoretical classes. Theoretical classes lead to the decline in the understanding of a lecture, and hurt their concentration. Many instructors have tried to make use of educational tools to help students understand lectures and arouse interests. This paper describes the design and implementation of a CPU scheduling simulator which shows the operation of process scheduling algorithms visually. The academic achievement evaluation for 2010's students and 2011's and t-test results show that the differences of the correct answer ratio for the exam about CPU scheduling algorithms are meaningful. The survey shows that the simulator is useful as an educational tool which causes the interests and enhances the understanding of a lecture, this teaching method is effective to develop problem solving skills.

A performance analysis of layered LDPC decoder for mobile WiMAX system (모바일 WiMAX용 layered LDPC 복호기의 성능분석)

  • Kim, Eun-Suk;Kim, Hae-Ju;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.4
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    • pp.921-929
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    • 2011
  • This paper describes an analysis of the decoding performance and decoding convergence speed of layered LDPC(low-density parity-check) decoder for mobile WiMAX system, and the optimal design conditions for hardware implementation are searched. A fixed-point model of LDPC decoder, which is based on the min-sum algorithm and layered decoding scheme, is implemented and simulated using Matlab model. Through fixed-point simulations for the block lengths of 576, 1440, 2304 bits and the code rates of 1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6 specified in the IEEE 802.16e standard, the effect of internal bit-width, block length and code rate on the decoding performance are analyzed. Simulation results show that fixed-point bit-width larger than 8 bits with integer part of 5 bits should be used for acceptable decoding performance.

A Design of Multi-Standard LDPC Decoder for WiMAX/WLAN (WiMAX/WLAN용 다중표준 LDPC 복호기 설계)

  • Seo, Jin-Ho;Park, Hae-Won;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.2
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    • pp.363-371
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    • 2013
  • This paper describes a multi-standard LDPC decoder which supports 19 block lengths(576~2304) and 6 code rates(1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6) of IEEE 802.16e mobile WiMAX standard and 3 block lengths(648, 1296, 1944) and 4 code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A DFU(decoding function unit) based on sign-magnitude arithmetic is used for hardware reduction. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a 0.13-${\mu}m$ CMOS cell library. It has 312,000 gates and 70,000 bits RAM. The estimated throughput is about 79~210 Mbps at 100 MHz@1.8v.

Implementation of the T2-MI Demultiplexer for Hybrid Broadcasting (융합 방송을 위한 T2-MI 역 다중화기 구현)

  • Bae, Chul Kyun;Chae, Chang Seok;Lee, Hyo Jung;Kim, Young Hun;Kim, Dae Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.5
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    • pp.949-956
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    • 2016
  • By recent development of wired and wireless communication technology, any service can be delivered through broadcasting networks or communication networks. So contents consumers want to receive broadcasting program via any accessible network. Network independent broadcasting system can receive optimized multimedia contents by combining the high-quality multimedia contents transmitted through broadcasting network and the additional contents delivered through communication network. Additional contents can be other multimedia contents, URL of contents, some texts for indicating information of received multimedia, etc. Network independent broadcasting system is in early stage of development, and receivers and the monitoring system for hybrid broadcast are under development. Thus the multiplexing method and demultiplexing method to perform hybrid broadcasting is on study. In this paper, we designed the demultiplexing algorithm to perform hybrid broadcasting system and implemented demultiplexer system based on modulator interface system standard T2-MI of DVB-T2.