• Title/Summary/Keyword: implementation algorithm

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An Analysis of CD Distortions in Simple FD/CD Transcoding Algorithm (FD/CD 트랜스코딩기법에서 CD에 의한 왜곡 분석)

  • 김진수;김재곤;강경옥;김진웅
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.105-108
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    • 2003
  • In the framework of universal multimedia access, one challenge for video transmission (communication) is to deliver video content through heterogeneous network channels matching the diversity of client devices. As one of the many adaptation methods, media transcoding is commonly considered. Particularly, FD (Frame Dropping)/CD Coefficient Dropping) transcoding is used due to the low computational complexity and simple implementation. In this scheme, CD is simply implemented by truncating the high frequency AC DCT coefficient bits. But, the CD error tends to be propagated within single GOV. In this paper, we derive the distortion relationships between CD error and propagation error, and investigate the error characteristics by computer simulations. The CD error characteristics can be effectively used in the FD/CD transcoding scheme.

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An Efficient Method for Transmission of Contour Information in Mobile GIS Environments (모바일 GIS 환경에서 등고선 정보의 효율적인 전송 기법)

  • Choi, Jin-Oh
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.6
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    • pp.1111-1116
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    • 2009
  • For expression of contour lines in mobile GIS environments, the client needs to receive the numerical data with the topographical map from a server. At this point, a client can't get the entire raw data because of the mobile characteristics. The approach to get representative points and to make isogram by interpolation methods, has some problems. The approach requires huge computing overhead at the client and doesn't guarantee the correctness of the isogram. In this paper, a data structure, algorithm and implementation results for efficient transmission of contour information to a client which is constructed from elevation information at a server, are proposed.

Design & Implementation of Authentication System for Home Network Service (홈 네트워크 서비스를 위한 인증 시스템 설계 및 구현)

  • Seol, Jeong-Hwan;Lee, Ki-Young
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.917-920
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    • 2007
  • In this paper, we designed the authentication system for home network service and applied it to actual sensor nodes. SNEP protocol of SPINS provides confidentiality of data and authentication. We achieved authentication key, encryption and decryption applied RCS encryption algorithm of SNEP. In addition, we used pair-wise key pre-distribution for prevention of authentication sniffing in wireless sensor network. The experiment environment consists of a base station receiving data and sensor nodes sending data. Each sensor nodes sends both the data and encrypted authentication key to the base station. The experiences had shown that the malfunction doesn't happen in communication among other groups. And we confirmed in tests that the system is secure when a sensor having malicious propose is added.

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EVALUATION OF SPEED AND ACCURACY FOR COMPARISON OF TEXTURE CLASSIFICATION IMPLEMENTATION ON EMBEDDED PLATFORM

  • Tou, Jing Yi;Khoo, Kenny Kuan Yew;Tay, Yong Haur;Lau, Phooi Yee
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.89-93
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    • 2009
  • Embedded systems are becoming more popular as many embedded platforms have become more affordable. It offers a compact solution for many different problems including computer vision applications. Texture classification can be used to solve various problems, and implementing it in embedded platforms will help in deploying these applications into the market. This paper proposes to deploy the texture classification algorithms onto the embedded computer vision (ECV) platform. Two algorithms are compared; grey level co-occurrence matrices (GLCM) and Gabor filters. Experimental results show that raw GLCM on MATLAB could achieves 50ms, being the fastest algorithm on the PC platform. Classification speed achieved on PC and ECV platform, in C, is 43ms and 3708ms respectively. Raw GLCM could achieve only 90.86% accuracy compared to the combination feature (GLCM and Gabor filters) at 91.06% accuracy. Overall, evaluating all results in terms of classification speed and accuracy, raw GLCM is more suitable to be implemented onto the ECV platform.

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FPGA Implementation of CORDIC-based Phase Calculator for Depth Image Extraction (Depth Image 추출용 CORDIC 기반 위상 연산기의 FPGA 구현)

  • Koo, Jung-youn;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.279-282
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    • 2012
  • In this paper, a hardware architecture of phase calculator for 3D image processing is proposed. The designed phase calculator, which adopts a pipelined architecture to improve throughput, performs arctangent operation using vectoring mode of CORDIC algorithm. Fixed-point MATLAB modeling and simulations are carried out to determine the optimized bit-widths and number of iteration. Phase calculator designed in Verilog HDL is verified by emulating the restoration of virtual 3D data using MATLAB/Simulink and FPGA-in-the-loop verification.

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Implementation of low power BSPE Core for deep learning hardware accelerators (딥러닝을 하드웨어 가속기를 위한 저전력 BSPE Core 구현)

  • Jo, Cheol-Won;Lee, Kwang-Yeob;Nam, Ki-Hun
    • Journal of IKEEE
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    • v.24 no.3
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    • pp.895-900
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    • 2020
  • In this paper, BSPE replaced the existing multiplication algorithm that consumes a lot of power. Hardware resources are reduced by using a bit-serial multiplier, and variable integer data is used to reduce memory usage. In addition, MOA resource usage and power usage were reduced by applying LOA (Lower-part OR Approximation) to MOA (Multi Operand Adder) used to add partial sums. Therefore, compared to the existing MBS (Multiplication by Barrel Shifter), hardware resource reduction of 44% and power consumption of 42% were reduced. Also, we propose a hardware architecture design for BSPE Core.

Preprocessing Methods for Effective Modulo Scheduling on High Performance DSPs (고성능 디지털 신호 처리 프로세서상에서 효율적인 모듈로 스케쥴링을 위한 전처리 기법)

  • Cho, Doo-San;Paek, Yun-Heung
    • Journal of KIISE:Software and Applications
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    • v.34 no.5
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    • pp.487-501
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    • 2007
  • To achieve high resource utilization for multi-issue DSPs, production compiler commonly includes variants of iterative modulo scheduling algorithm. However, excessive cyclic data dependences, which exist in communication and media processing loops, unduly restrict modulo scheduling freedom. As a result, replicated functional units in multi-issue DSPs are often under-utilized. To address this resource under-utilization problem, our paper describes a novel compiler preprocessing strategy for effective modulo scheduling. The preprocessing strategy proposed capitalizes on two new transformations, which are referred to as cloning and dismantling. Our preprocessing strategy has been validated by an implementation for StarCore SC140 DSP compiler.

A Three-Phase High Frequency Semi-Controlled Battery Charging Power Converter for Plug-In Hybrid Electric Vehicles

  • Amin, Mahmoud M.;Mohammed, Osama A.
    • Journal of Power Electronics
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    • v.11 no.4
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    • pp.490-498
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    • 2011
  • This paper presents a novel analysis, design, and implementation of a battery charging three-phase high frequency semi-controlled power converter feasible for plug-in hybrid electric vehicles. The main advantages of the proposed topology include high efficiency; due to lower power losses and reduced number of switching elements, high output power density realization, and reduced passive component ratings proportionally to the frequency. Additional advantages also include grid economic utilization by insuring unity power factor operation under different possible conditions and robustness since short-circuit through a leg is not possible. A high but acceptable total harmonic distortion of the generator currents is introduced in the proposed topology which can be viewed as a minor disadvantage when compared to traditional boost rectifiers. A hysteresis control algorithm is proposed to achieve lower current harmonic distortion for the rectifier operation. The rectifier topology concept, the principle of operation, and control scheme are presented. Additionally, a dc-dc converter is also employed in the rectifier-battery connection. Test results on 50-kHz power converter system are presented and discussed to confirm the effectiveness of the proposed topology for PHEV applications.

Design and Implementation of Big Data Platform for Image Processing in Agriculture (농업 이미지 처리를 위한 빅테이터 플랫폼 설계 및 구현)

  • Nguyen, Van-Quyet;Nguyen, Sinh Ngoc;Vu, Duc Tiep;Kim, Kyungbaek
    • Annual Conference of KIPS
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    • 2016.10a
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    • pp.50-53
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    • 2016
  • Image processing techniques play an increasingly important role in many aspects of our daily life. For example, it has been shown to improve agricultural productivity in a number of ways such as plant pest detecting or fruit grading. However, massive quantities of images generated in real-time through multi-devices such as remote sensors during monitoring plant growth lead to the challenges of big data. Meanwhile, most current image processing systems are designed for small-scale and local computation, and they do not scale well to handle big data problems with their large requirements for computational resources and storage. In this paper, we have proposed an IPABigData (Image Processing Algorithm BigData) platform which provides algorithms to support large-scale image processing in agriculture based on Hadoop framework. Hadoop provides a parallel computation model MapReduce and Hadoop distributed file system (HDFS) module. It can also handle parallel pipelines, which are frequently used in image processing. In our experiment, we show that our platform outperforms traditional system in a scenario of image segmentation.

Design and Implementation of Optimal LED Emotional-Lighting Control System (최적의 LED 감성조명 제어 시스템 설계 및 구현)

  • Yun, Su-Jeong;Lin, Chi-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.8
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    • pp.1637-1642
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    • 2015
  • Next-generation applications using technology IT fused to biological signals from the emotional state to extract a lot of research has been, and the sensitivity of the human sensory functions influences the physiological condition known to be the fact that. In this paper, Propose an Emotional-lighting control algorithm using bio-signals. LED lighting for Emotion light is environmentally friendly and has a high efficiency and long life. In particular, LED lights are different colors represent the possible single light sphere advantages. And, Human sensitivity for determining a more accurate biological signals using EEG was collected using EEG equipment sensitivity was determined to analyze the EEG.