• Journal of the Institute of Electronics and Information Engineers
• /
• v.52 no.2
• /
• pp.97-105
• /
• 2015

This paper discusses the implementation of Bruun's FFT on a SIMD processor. FFT is an algorithm used in digital signal processing area and its effective processing is important in the enhancement of signal processing performance. Bruun's FFT algorithm is one of fast Fourier transform algorithms based on recursive factorization. Compared to popular Cooley-Tukey algorithm, it is advantageous in computations because most of its operations are based on real number multiplications instead of complex ones. However it shows more complicated data alignment patterns and requires a larger memory for storing coefficient data in its implementation on a SIMD processor. According to our experiment result, in the processing of the FFT with 1024 complex input data on a SIMD processor, The Bruun's algorithm shows approximately 1.2 times higher throughput but uses approximately 4 times more memory (20 Kbyte) than the Cooley-Tukey algorithm. Therefore, in the case with loose constraints on silicon area, the Bruun's algorithm is proper for the processing of FFT on a SIMD processor.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.10
• /
• pp.75-82
• /
• 2008

In this paper, we propose an efficient symbol detection algorithm for multiple-input multiple-output spatial multiplexing (MIMO-SM) systems and present its design and implementation results. By enhancing the performance of the first detected symbol which causes error propagation, the proposed algorithm achieves a considerable performance gain as compared to the conventional sorted QR decomposition (SQRD) based detection and the ordered successive detection (OSD) algorithms. The bit error rate (BER) performance of the proposed detection algorithm is evaluated by the simulation. In case of 16QAM MIMO-SM system with 4 transmit and 4 receive ($4{\times}4$) antennas, at $BER=10^{-3}$ the proposed algorithm obtains the gai improvement of about 2.5-13.5 dB over the conventional algorithms. The proposed detection algorithm was designed in a hardware description language (HDL) and synthesized to gate-level circuits using 0.18um 1.8V CMOS standard cell library. The results show that the proposed algorithm can be implemented without increasing the hardware costs significantly.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.46 no.6
• /
• pp.95-101
• /
• 2009

Among the adaptive noise cancellers (ANC), the least mean square (LMS) algorithm has probably become the most popular algorithm because of its robustness, good tracking properties, and simplicity of implementation. However, it has non-uniform convergence and a trade-off between the rate of convergence and excess mean square error (EMSE). To overcome these shortcomings, a number of variable step size least mean square (VSSLMS) algorithms have been researched for years. These LMS algorithms use a complex variable step method approach for rapid convergence but need high computational complexity. A variable step approach can impair the simplicity and robustness of the LMS algorithm. The proposed instantaneous gain control (IGC) algorithm uses the instantaneous gain value of the original signal and the noise signal. As a result, the IGC algorithm can reduce computational complexity and maintain better performance.

• Journal of the Korean Data and Information Science Society
• /
• v.27 no.4
• /
• pp.911-923
• /
• 2016

Machine learning becomes increasingly important in the big data era. Logistic regression is a type of classification in machine leaning, and has been widely used in various fields, including medicine, economics, marketing, and social sciences. Rhipe that integrates R and Hadoop environment, has not been discussed by many researchers owing to the difficulty of its installation and MapReduce implementation. In this paper, we present the MapReduce implementation of Gradient Descent algorithm and Newton-Raphson algorithm for logistic regression using Rhipe. The Newton-Raphson algorithm does not require a learning rate, while Gradient Descent algorithm needs to manually pick a learning rate. We choose the learning rate by performing the mixed procedure of grid search and binary search for processing big data efficiently. In the performance study, our Newton-Raphson algorithm outpeforms Gradient Descent algorithm in all the tested data.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.12 no.3
• /
• pp.221-233
• /
• 2007

In this paper, a simple but effective position profile generation algorithm for single axis high dynamic linear machine drive system is presented. In the recent industrial application fields like as LCD/PDP and semiconductor factory, requirements for the high performance positioning system with optimal position profile generator are highly increased to reduce the overall processing time. There might be various solutions for position profile generating algorithm according to the application type. A square-wave Impact quantity(Jerk) based algorithm with minimal locomotion time is argued in this paper to minimize the total time of one movement under some specific constrains such as maximum speed limit and maximum acceleration limit. In order to reduce the calculation efforts and satisfy the minimal locomotion time condition, the time variants representing each profile sector and a simple condition comparison algorithm are adopted. Also, the actual implementation method for profile generation algorithm and it's real performance results are presented through commercial linear machine drive system.

• Aerospace Engineering and Technology
• /
• v.13 no.2
• /
• pp.38-46
• /
• 2014

CRC (Cyclic Redundancy Codes) is a error detection method for the date transmission, which is applied to the GRDDP (GOES-R Reliable Data Delivery Protocol) between satellite and GEMS (Geostationary Environmental Monitoring Sensor) on the GEO-KOMPSAT 2B development. This paper introduces a principle of the table based CRC, and explains software implementation results of the CRC8 applied to GEMS.

• ETRI Journal
• /
• v.35 no.1
• /
• pp.18-26
• /
• 2013

This paper proposes an efficient bandwidth utilization (EBU) algorithm that utilizes the unused bandwidth in dynamic bandwidth allocation (DBA) of a 10-gigabit-capable passive optical network (XGPON). In EBU, an available byte counter of a queue can be negative and the unused remainder of an available byte counter can be utilized by the other queues. In addition, EBU uses a novel polling scheme to collect the requests of queues as soon as possible. We show through analysis and simulations that EBU improves performance compared to that achieved with existing methods. In addition, we describe the hardware implementation of EBU. Finally we show the test results of the hardware implementation of EBU.

• 제어로봇시스템학회:학술대회논문집
• /
• 2003.10a
• /
• pp.65-68
• /
• 2003

This paper presents a design and construction of IIR multiple notch filter by modifying the pole-zero placement with least square estimation to find the appropriate gain and pole positions for the filter within a unit circle in z-plane. The appropriated gain and pole position will render the controllable unit gain of filter magnitude. Algorithm design and system simulation are performed on MATLAB while the actual implementation is done on the TMS320C31 digital signal processing board.

• Korean Journal of Computational Design and Engineering
• /
• v.16 no.4
• /
• pp.285-291
• /
• 2011

A pose estimation process from medical images is calculating locations and orientations of objects obtained from Computed Tomography (CT) volume data utilizing X-ray images from two directions. In this process, digitally reconstructed radiograph (DRR) images of spatially transformed objects are generated and compared to X-ray images repeatedly until reasonable transformation matrices of the objects are found. The DRR generation and image comparison take majority of the total time for this pose estimation. In this paper, a fast DRR generation technique based on GPU parallel computing is introduced. A volume ray-casting algorithm is explained with brief vector operations and a parallelization technique of the algorithm using Compute Unified Device Architecture (CUDA) is discussed. This paper also presents the implementation results and time measurements comparing to those from pure-CPU implementation and open source toolkit.

• The Journal of Society for e-Business Studies
• /
• v.6 no.1
• /
• pp.17-33
• /
• 2001

EC(Electronic Commerce) which is done on the virtual space through Internet has strong point like independence from time and space. On the contrary, it also has weak point like security problem because anybody can access easily to the system due to open network attribute of Internet, Therefore, we need the solutions that protect the EC security problem for safe and useful EC activity. One of these solutions is the implementation of strong cipher system. YK2(Young Ku King) cipher system proposed in this paper is good solution for the EC security and it overcome the limit of current block cipher system using 128 bits key length for input, output, encryption key and 32 rounds. Moreover, it is designed for the increase of time complexity by adapting more complex design for key scheduling algorithm regarded as one of important element effected to encryption.