• Journal of Korea Society of Industrial Information Systems
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• v.17 no.7
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• pp.71-79
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• 2012

Propose stream cipher Canon that need in Wireless sensor network construction that can secure confidentiality and integrity. Create Canon 128 bits streams key by 128 bits secret key and 128 bits IV, and makes 128 bits cipher text through whitening processing with produced streams key and 128 bits plaintext together. Canon for easy hardware implementation and software running fast algorithm consists only of simple logic operations. In particular, because it does not use S-boxes for non-linear operations, hardware implementation is very easy. Proposed stream cipher Canon shows fast speed test results performed better than AES, Salsa20, and gate number is small than Trivium. Canon purpose of the physical environment is very limited applications, mobile phones, wireless Internet environment, DRM (Digital Right Management), wireless sensor networks, RFID, and use software and hardware implementation easy 128 bits stream ciphers.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.44 no.8
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• pp.657-665
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• 2016

Launch Control System(LCS) performs the pre-launch preparation and launch operation during launch campaign. The successful launch operation is basically influenced by hardware and software of LCS. Especially, a trivial errors in control algorithm can cause critical problem or disaster in launch operation. Therefore, the hidden or implicit errors should be distinguished and eliminated by the verification test in advance. In this paper, the design and implementation of hardware and software simulator which have already been used in LCS verification will be introduced. By presenting the detailed design and flowchart-based algorithms, we make other similar systems adopt the implementation philosophies of this paper. Especially, this paper emphasizes that all the simulation algorithms work on the self-controller in LCS without using separated computer or PLC.

• The Journal of the Acoustical Society of Korea
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• v.19 no.7
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• pp.42-47
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• 2000

This paper describes a real-time implementation of a GSM-EFR (Global System for Mobil communications Enhanced Full Rate) speech coder using OakDSP core; a 16bit fixed-point Digital Signal Processor (DSP) by DSP Group, Inc. The real-time implemented speech coder required about 24MIPS for computation and 7.06K words and 12.19K words for code and data memory, respectively. The implemented GSM-EFR speech coder passes all of test vectors provided by ETSI (European Telecommunication Standard Institute), and perceptual speech quality measurement using MNB algorithm shows that the quality of the GSM-EFR speech coder is similar to the one of 32kbps ADPCM. The real-time implemented GSM-EFR speech coder which is the highest bit-rate mode of the GSM-AMR speech coder will be used as the basic structure of the GSM-AMR speech coder which is embedded in MODEM ASIC of IMT2000 asynchronous mode mobile station.

• The Journal of the Acoustical Society of Korea
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• v.30 no.8
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• pp.461-467
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• 2011

Accurate classification of input signals is the key prerequisite for variable bit-rate coding, which has been introduced in order to effectively utilize limited communication bandwidth. Especially, recent surge of multimedia services elevate the importance of speech/music classification. Among many speech/music classifier, the ones based on support vector machine (SVM) have a strong selling point, high classification accuracy, but their computational complexity and memory requirement hinder their way into actual implementations. Therefore, techniques that reduce the computational complexity and the memory requirement is inevitable, particularly for embedded systems. We first analyze implementation of an SVM-based classifier on embedded systems in terms of execution time and energy consumption, and then propose two techniques that alleviate the implementation requirements: One is a technique that removes support vectors that have insignificant contribution to the final classification, and the other is to skip processing some of input signals by virtue of strong correlations in speech/music frames. These are post-processing techniques that can work with any other optimization techniques applied during the training phase of SVM. With experiments, we validate the proposed algorithms from the perspectives of classification accuracy, execution time, and energy consumption.

• Journal of Korea Multimedia Society
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• v.13 no.7
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• pp.943-949
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• 2010

This paper presents some improvements on VLSI implementation of lifting-based 9/7 wavelet transform by optimization hardware multiplication. The proposed solution requires less logic area and power consumption without performance loss compared to previous wavelet filter structure based on lifting scheme. This paper proposes a better approach to the hardware implementation using Lefevre algorithm based on extensions of Pattern search methods. To compare the proposed structure to the previous solutions on full multiplier blocks, we implemented them using Verilog HDL. For a hardware implementation of the two solutions, the logical synthesis on 0.18 um standard cells technology show that area, maximum delay and power consumption of the proposed architecture can be reduced up to 51%, 43% and 30%, respectively, compared to previous solutions for a 200 MHz target clock frequency. Our evaluation show that when design VLSI chip of lifting-based 9/7 wavelet filter, our solution is better suited for standard-cell application-specific integrated circuits than prior works on complete multiplier blocks.

• Journal of the Korea Society of Computer and Information
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• v.7 no.4
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• pp.8-15
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• 2002

This Paper proposes designing and implementing the database system storing the medical images. This system collects the medical image when doctors operate and diagnose the patients using the endoscope in the orthopedics, then stores the medical image data to database. Therefore. system avoids duplicated medical data, retrieves and updates the medical data effectively. The medical image data can be shared to the multiple users and application programs. This system consists of the five components. that is, the input module acquiring the medical image from the endoscope. the modulo storing the medical image. the database design and implementation storms the patient's disease history and the medical image data, user friendly interface design and implementation, and the simple data retrieval engine. The features of the system are followed. The image catcher program using DirectShow is portable any image catcher board And because the image catcher algorithm is implemented as a public module, The throughput can be increased during the development of video and audio contents on internet.

• The Journal of the Acoustical Society of Korea
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• v.19 no.4
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• pp.37-44
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• 2000

In this paper, we described the real-time implementation effort of MPEG-4 audio HVXC (Harmonic Vector eXcitation Coding) algorithm for very low bitrates, which has target applications from mobile communications to Internet telephony, on current high performance floating point TMS320C6701 DSP. We adopted a hardware structure for real-time operation. In order for software optimization, we used C- and assembly-language level optimizations for time-critical functional codes. Utilizing the internal program memory of the DSP as the program cache, the internal data memory overlap technique and DMA functionality, we could get a goal of realtime operation of HVXC codec both at 2 kbit/s and at 4 kbit/s. For an encoder at 2 kbit/s, the optimization ratio to original code is about 96 %. Finally, we got the subjective quality of MOS 2.45 at 2 kbit/s from an informal quality test.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.12
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• pp.1834-1843
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• 2016

DVRs are the most common recording and displaying devices used for surveillance. Video compression plays a key role in DVRs for saving storage; the video compression standard, H.264/AVC, has recently become the dominant choice for DVRs. DVRs require various display modes, such as fast-forward, backward play, and pause; these are called trick modes. The implementation of precise trick mode play requires a very high decoding capability or a very intelligent scheme in order to handle the high computation complexity. The complexity is increased in many surveillance applications where more than one camera is used to monitor multiple spots or to monitor the same area using various angles. An implementation of a trick mode play and a frame buffer management scheme for the hardware-based H.264/AVC codec for multi-channel is presented in this paper. The experimental results show that exact trick mode play is possible using a standard H.264/AVC video codec with keyframe encoding feature at the expense of bitstream size increase.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.5
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• pp.1690-1710
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• 2014

In this paper, we propose the rapid implementation of a 3-dimensional (3D) facial reconstruction from a single frontal face image and introduce a design for its application on a mobile device. The proposed system can effectively reconstruct human faces in 3D using an approach robust to lighting conditions, and a fast method based on a Canonical Correlation Analysis (CCA) algorithm to estimate the depth. The reconstruction system is built by first creating 3D facial mapping from a personal identity vector of a face image. This mapping is then applied to real-world images captured with a built-in camera on a mobile device to form the corresponding 3D depth information. Finally, the facial texture from the face image is extracted and added to the reconstruction results. Experiments with an Android phone show that the implementation of this system as an Android application performs well. The advantage of the proposed method is an easy 3D reconstruction of almost all facial images captured in the real world with a fast computation. This has been clearly demonstrated in the Android application, which requires only a short time to reconstruct the 3D depth map.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.2
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• pp.163-168
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• 2010

This paper presents the practical implementation of an over-temperature protection system for power semiconductor devices. In the proposed system, temperature variation is provided with just using $R_{ds(on)}$ characteristics of power MOSFET, while extra device such as a temperature sensor or an over-temperature detection transistor is needed to monitor the temperature in the conventional method. The proposed protection technique is experimentally tested on IRF840 power MOSFET. The PIC microcontroller PIC16F877A is used for the implementation of the proposed protection algorithm. The built-in 10-bit A/D converter is utilized for detecting voltage variance between a drain and a source of IRF840. The induced temperature-resistance relationship based on the measured drain-source voltage, supplies a gate signal to the power MOSFET. If detected temperature's voltage exceeds any a protection temperature's voltage, the microcontroller removes the trigger signal from the power MOSFET. These test results showed satisfactory performances of the proposed protection system in term of accuracy within 1.5%.