• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.172-174
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• 2004

This paper proposes an integerized approach to solve PCA(Principal Component Analysis) feature extract procedure mainly used for the face recognition. A simple conversion to integer values has the risk to reduce the precision compared to that of the floating points operations. We integerize the PC variables by normalizing with the maximum of them, and show the efficiency of the proposed scheme by comparing the results to those of the float/double precisions. The integerized scheme is expected to be an efficient way for the real-time implementation of PCA's recognition stage, because integer operator is more desirable than floating point ones. Further research is to find a way to implement face detection and to measure the distances from the stored PCs for the full real-time face recognition.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.727-730
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• 1998

In this paper, we propose an implementation of an efficient parallel Radon transform on TMS320C80-based system. For an N$\times$N SAR image, we can obtain O(NM/p) of the conventional parallel Radon transform, by representing the projection patterns in Radon space variables instead of the image space variables, and pipelining the algorithm, where p is the number of processors and M is the number of projection angles. Also, we can reduce the time for the dynamic load distribution among the nodes and the communication overheads of accessing the global memories, by pipelining the memory and processing operations by using tripple buffer structure. Experimental results show an efficient parallel Radon transform of speedup Sp=3.9 and efficiency E=97.5% for 256$\times$256 image, when implemented on TMS320C80 composed of four parallel slave processors with three memory blocks.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.4
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• pp.156-163
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• 1996

In this paper, we described the implementation and the sound quality assessment of a real-time stereo audio codec using TMS320C40 DSP (digital signal processing) chip for low bitrte and high quality audio. We implemented hardware and software in order to overcome a real-time processing problem of audio compression algorithm that can be produced by largely recursive computing and complexity of the process. We have studied five types of distortion that can be produced by perceptual coding and the codec was evaluated by eight test musics that are selected in SQAM (sound quality assessment material) 422-2-4-2 produced by EBU (european broadcast union). The subjective listening tests were carried out on the codec quality and preformance by double blind method in a listening room with eleven listeners. As a result, 5 grade-impairment scale was scored under minus one and the codec quality was evaluated to be perceptible, but not annoying.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2003.09a
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• pp.300-303
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• 2003

An Algorithm based on direct implementation of variable structure systems theory approach is proposed for on-line training of multilayer perceptrons. Network structures which have multiple inputs, single output and one hidden layer are considered and the weights are assumed to have capabilities for continuous time adaptation. The zero level set of the network learning error is regarded as a sliding surface in the learning parameters space. A sliding mode trajectory can be brought on and reached in finite time on such a sliding manifold. Results from simulated on-line identification task for a two-link planar manipulator dynamics are also presented.

• Speech Sciences
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• v.9 no.3
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• pp.17-24
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• 2002

The goal of this research is the real-time implementation of an AEC (Acoustic Echo Canceller) using the floating-point digital signal processor of TMS320C31. We employ an FIR-type adaptive filter with the conventional NLMS (Normalized Least Mean Square) algorithm for the adaptation of filter coefficients. We program and optimize the system in the assembler level to make it run in real-time. With 8 kHz sampling rate, the implemented AEC requires $46\;\mu$sec and $77\;\mu$sec computational time per sample for 128-and 256-tap filter, respectively. It corresponds to 37% and 62% of maximum computational ability of TMS320C31 DSP.

• Journal of the Korean School Mathematics Society
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• v.6 no.2
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• pp.101-115
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• 2003

DES is a very simple crytosystem that uses only permutation in mathematics. Recently AES is standardized based on DES. In this paper we introduce DES and its implementation. In particular, we tried to process Hangul in DES. This paper may be used in school mathematics education.

• The Transactions of the Korea Information Processing Society
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• v.3 no.4
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• pp.709-719
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• 1996

DHCP(Dynamic Host Configuration Protocol)is a protocol which dynamically allocates an IP address and/or host configuration parameters to a host. But because this protocol uses broadcasting for message exchange, it causes heavy traffic and overload on the network. By avoiding unnecessary broadcasting and using a simple and efficient implementation model, we can reduce such heavy traffic and overload. We have studied on characteristics of the broadcasting the traffic caused by DHCP, and implement the model which can reduce traffic by improving algorithm and unicasting messages.

• Journal of computational fluids engineering
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• v.16 no.4
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• pp.55-63
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• 2011

In this study, Fire Dynamic Simulator (FDS) has been improved with the implementation of marker particles. Convectional FDS is able to implement only two curved geometries, namely, circular cylinders and spheres. The introduction of marker particles made it possible to implement arbitrarily curved objects. Moreover, an algorithm that extracts the marker particle information from a model designed by AutoCAD was developed. With the present implementation, applicability of FDS is greatly enhanced, beneficial to both academia and industry.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1071-1073
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• 1992

PWM technique is widely applied to the control of AC machines. In this paper a new PWM technique for real-time implementation of variable-frequency sinusoidal PWM is introduced. In the proposed algorithm, a low pass filter is used and the switching state is so determined as to minimize the difference between the reference wave and the output of the filter.

• Journal of the Korean Society of Industry Convergence
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• v.3 no.1
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• pp.9-15
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• 2000

This paper presents a implementation of digital motion control system for induction motor vector drives using the 16bit DSP TMS320F240. The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent controllers for motors which can be yield enhanced operation, fewer system components, lower system cost, increased efficiency and high performance. The system presented are speed and current sensing, sine look-up table and generated SVPWM by fully integrated control software. The developed system in a implementation are shown a good speed response and motion control characteristic results, and high performance features in general purposed 2.2[kW] machine. The system can be adapted variform motor drive system.