• Title/Summary/Keyword: implementation algorithm

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VLSI Implementation of CORDIC-Based Digital Quadrature Demodulator (CORDIC을 이용한 디지탈 Quadrature 복조기의 VLSI 구현)

  • 남승현;성원용
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.7
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    • pp.1718-1731
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    • 1998
  • Digital quadrature demodulator is needed for the coherent demodulation in the digital communication systems such as Binary Phase-Shift-Keying, Quadrature Phase-Shift-Keying, and Quadrature Anmplitude Modulation. Conventaionally, the DDFS (Direct Digital Frequency Synthsizer) is used for generating the carrier signal and seperate multi-pliers are used for mixing. And the DDFS is implemented using the ROM (Read Only Memory), which can be a bottle-neck neck when the fast-speed and small-area implementation is required. A new architecture is developed, which employs the circular rotation mode of the CORDIC algorithm for signal mixing as well as carrier generation. To optimize the hardware design parameters, the finiteword-length effects of the proposed implementation arachitecture are analyzed in comparison with a conventional ROM-based architecture. The hardware costs are also estimated, which showed that the proposed architecture occupies only a third of the area of the conventional ROM-based architecture for the same performance. A full-custom VLSI is developed using the proposed architecture.

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Low-Power Frequency Offset Synchronization Block Design and Implementation using Pipeline CORDIC (Pipeline CORDIC을 이용한 저전력 주파수 옵셋 동기화기 설계 및 구현)

  • Ha, Jun-Hyung;Jung, Yo-Sung;Cho, Yong-Hoon;Jang, Young-Beom
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.10
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    • pp.49-56
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    • 2010
  • In this paper, a low-power frequency offset synchronization structure using CORDIC algorithm is proposed. Main blocks of frequency offset synchronization are estimation and compensation block. In the proposed frequency offset estimation block, implementation area is reduced by using sequential CORDIC, and throughput is accelerated by using 2 step CORDIC. In the proposed frequency offset compensation block, pipeline CORDIC is utilized for area reduction and high speed processing. Through MatLab simulation, function for proposed structure is verified. Proposed frequency offset synchronization structure is implemented by Verilog-HDL coding and implementation area is estimated by Synopsys logic synthesis tool.

Design and Implementation of OFDM Frequency Offset Synchronization Block Using CORDIC (CORDIC을 이용한 OFDM 주파수 옵셋 동기부 설계 및 구현)

  • Jang, Young-Beom;Han, Jae-Woong;Hong, Dae-Ki
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.5
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    • pp.118-125
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    • 2008
  • In this paper, an efficient frequency offset synchronization structure for OFDM(Orthogonal Frequency Division Multiplexing) is proposed. Conventional CORDIC(Coordinate Rotation Digital Computer) algorithm for frequency offset synchronization utilizes two CORDIC hardware i.e., one is vector mode for phase estimation, the other is rotation mode for compensation. But proposed structure utilizes one CORDIC hardware and divider. Through simulation, it is shown that hardware implementation complexity is reduced compared with conventional structures. The Verilog-HDL coding and front-end chip implementation results for the proposed structure show 22.1% gate count reduction comparison with those of the conventional structure.

Design and Implementation of an XML-based Planning Agent for Internet Marketplaces (인터넷 마켓플레이스를 위한 XML 기반 계획 에이전트의 설계와 구현)

  • Lee, Yong-Ju
    • The KIPS Transactions:PartD
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    • v.8D no.3
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    • pp.211-220
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    • 2001
  • A planning agent supporting customers plays a distinguished role in internet marketplaces. Although several internet marketplaces have been built with the maturity of tools based on internet and distributed technologies, there has been no actual study up to now with respect to the implementation of the planning agent. This paper describes the design and implementation of an XML-based planning agent for internet marketplaces. Since implementing internet marketplaces encounter problems similar to those in other fields such as multidatabase or workflow management systems, we first compare those features. Next we identify functions and roles of the planning agent. The planning agent is implemented using COM+, ASP, and XML, and demonstrated using real data used in an existing system.

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Implementation of Horse Gait and Riding Aids for Horseback Riding Robot Simulator HRB-1 (승마 로봇 시뮬레이터 HRB-1을 위한 말의 보행 및 부조의 구현)

  • Park, Yong-Sik;Seo, Kap-Ho;Oh, Seung-Sub;Park, Sung-Ho;Suh, Jin-Ho
    • Journal of Institute of Control, Robotics and Systems
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    • v.18 no.3
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    • pp.181-187
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    • 2012
  • Horse riding is widely recognized as a valuable form of education, exercise and therapy. But, the injuries observed in horse riding range from very minor injuries to fatalities. In order to reduce these injuries, the effective horseback riding simulator is required. In this paper, we proposed the implementation method of horse gait and riding aids for horseback riding robot simulator HRB-1. For implementation of horse gait to robot simulator, we gathered and modified real motion data of horse. We obtained two main frequencies of each gait by frequency analysis, and then simple sinusoidal functions are acquired by genetic algorithm. In addition, we developed riding aids system including hands, leg, and seat aids. With the help of a developed robotic system, beginners can learn the skill of real horse riding without the risk of injury.

Implementation of an FPGA-based Multi-Carrier PWM Techniques for Multilevel Inverter (FPGA기반 멀티레벨 인버터의 다중 반송신호 PWM 기법 구현)

  • Chun, Tae-Won;Lee, Hong-Hee;Kim, Heung-Geun;Nho, Eui-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.4
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    • pp.288-295
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    • 2010
  • Multi-level inverters have drawn much of attention in recent years because it can meet the demand of high power applications and good power quality associated with reduced harmonic distortion. As the number of voltage level increases, field programmable gate arrays (FPGAs) are suitable for the implementation of multi-level modulation algorithm. This paper proposes the implementation method for generating PWM pulses at the three phase diode clamped five-level inverter using FPGA. The strategy for communicating stably the data of three-phase reference voltages between the DSP and FPGA is suggested. The techniques for generating PWM signals based on a multi-carrier modulation method are carried out through the experiments with 32-bit DSP and Cyclone-III FPGA.

Implementation of End-to-End Training of Deep Visuomotor Policies for Manipulation of a Robotic Arm of Baxter Research Robot (백스터 로봇의 시각기반 로봇 팔 조작 딥러닝을 위한 강화학습 알고리즘 구현)

  • Kim, Seongun;Kim, Sol A;de Lima, Rafael;Choi, Jaesik
    • The Journal of Korea Robotics Society
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    • v.14 no.1
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    • pp.40-49
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    • 2019
  • Reinforcement learning has been applied to various problems in robotics. However, it was still hard to train complex robotic manipulation tasks since there is a few models which can be applicable to general tasks. Such general models require a lot of training episodes. In these reasons, deep neural networks which have shown to be good function approximators have not been actively used for robot manipulation task. Recently, some of these challenges are solved by a set of methods, such as Guided Policy Search, which guide or limit search directions while training of a deep neural network based policy model. These frameworks are already applied to a humanoid robot, PR2. However, in robotics, it is not trivial to adjust existing algorithms designed for one robot to another robot. In this paper, we present our implementation of Guided Policy Search to the robotic arms of the Baxter Research Robot. To meet the goals and needs of the project, we build on an existing implementation of Baxter Agent class for the Guided Policy Search algorithm code using the built-in Python interface. This work is expected to play an important role in popularizing robot manipulation reinforcement learning methods on cost-effective robot platforms.

Comparative analysis of quantum circuit implementation for domestic and international hash functions (국내·국제 해시함수에 대한 양자회로 구현 비교 분석)

  • Gyeong Ju Song;Min Ho Song;Hwa Jeong Seo
    • Smart Media Journal
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    • v.12 no.2
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    • pp.83-90
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    • 2023
  • The advent of quantum computers threatens the security of existing hash functions. In this paper, we confirmed the implementation results of quantum circuits for domestic/international hash functions, LSH, SHA2, SHA3 and SM3, and conducted a comparative analysis. To operate the existing hash function in a quantum computer, it must be implemented as a quantum circuit, and the quantum security strength can be confirmed by estimating the necessary quantum resources. We compared methods of quantum circuit implementation and results of quantum resource estimation in various aspects and discussed ways to meet quantum computer security in the future.

CONSTRUCTABILITY IMPLEMENTATION MODEL USING DEPENDENCY STRUCTURE MATRIX

  • Youngjib Ham;Moonseo Park;Hyun-Soo Lee
    • International conference on construction engineering and project management
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    • 2011.02a
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    • pp.550-555
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    • 2011
  • Utilizing construction knowledge and experiences in design phase can reduce change orders and improve productivity in construction phase. To do so, information must be made available to the design team in time. Current approaches for effective utilization of constructability knowledge, however, only focus on the formalization of constructability knowledge such as a checklist, which lacks the consideration of the appropriate use at the proper point in time. The inadequate use of constructability knowledge can result in unnecessary reworks. To deal with this problem, the design team needs to know what constructability knowledge is required for specific design activities in the design process. This paper presents a constructability implementation model using the dependency structure matrix (DSM) that focuses on information flows between design activities and constructability knowledge. For this objective, design activities in the design process are modeled in a matrix form based on their dependency. Then, constructability knowledge, which needs to be considered in the design stage, is mapped into activities and incorporated into the matrix, creating Constructability-DSM (C-DSM). Next, the partitioning algorithm is applied to C-DSM for optimal information flow. The Partitioned C-DSM is then analyzed based on the relationship between activities. Finally, the optimal utilization of construction knowledge in the design process is determined by identifying what constructability knowledge is required for each design activity, and how and when it is reflected to design for constructability. Thus, this research can help provide robust control actions to reduce unnecessary iterative cycles in design process for efficient constructability implementation.

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Implementation of Voice Control on PDA using the Text Independent Vocabulary Recognizer (가변어휘 인식기를 이용한 PDA상에서의 음성제어 구현)

  • Kwak Sang Hun;Choi Seung Ho;Shin Do Sung;Kim Jin Young
    • MALSORI
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    • no.43
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    • pp.57-72
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    • 2002
  • The technology of speech recognition has a wide field of application. The range of such technology is spreading into mobile computing having the large amount of movement for communication equipments at the present time. Particularly, recognition in internet environment is rapidly moving into mobile environment. Because of these environments, users want the faster speed of data transmission and the lighter portable equipment for data access. That is PDA(Personal Digital Assistant). Therefore, we designed a triphone-based text independent vocabulary recognizer for the implementation of speech control in this paper. The text independent vocabulary recognizer is based on the state .joint algorithm with decision trees

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