• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.46-52
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• 2009

A Multi-Core/Multi-Thread architecture is adopted for the Shader processor to enhance the processing performance. The Shader processor is designed to utilize its processing core IP for multiple purposes, such as Vertex-Shading, Rasterization, Pixel-Shading, etc. In this paper, we propose a 'Rasterization based on Vector Algorithm' that makes parallel pixels processing possible with Multi-Core and Multi-Thread architecture on the Shader Core. The proposed algorithm takes only 2% operation counts of the Scan-Line Algorithm and processes pixels independently.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.196-198
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• 2003

In this paper, Rijndal cipher algorithm is implemented by a hardware. It is selected as the AES(Advanced Encryption Standard) by NIST. The processor has structure that round operation divided into 2 subrounds and subrounds are pipelined to calculate efficiently. It takes 5 clocks for one-round. The AES-128 cipher algorithm is implemented for hardware by ALTERA FPGA, and then, analyzed the performance. The AES-128 cipher algorithm has approximately 424 Mbps encryption rate for 166Mhz max clerk frequency. In case of decryption, it has 363 Mbps decryption rate for 142Mhz max clock frequency.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.3
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• pp.718-723
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• 2013

In general, the boundary portion of the background and objects are the rapidly changing point and an important elements to analyze characteristics of image. Using these boundary parts, information about the position or shape of an object in the image are detected, and many studies have been continued in order to detect it. Existing methods are that implementation of algorithm is comparatively simple and its processing speed is fast, but edge detection characteristics is insufficient because weighted values are applied to all the pixels equally. Therefore, in this paper, we proposed an algorithm using region segmentation of the mask in order to adaptive edge detection according to image, and the results processed by proposed algorithm indicated superior edge detection characteristics in edge area.

• The KIPS Transactions:PartB
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• v.13B no.6 s.109
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• pp.607-614
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• 2006

In this paper, we propose an error resilience video coder which uses a hybrid error concealment algorithm. Firstly, the algorithm uses the error concealment with data hiding. If the hiding information is lost, the motion vector of lost macroblock is computed with adaptive selection of adjacent motion vectors and OBMC (Overlapped Block Motion Compensation) is applied with this motion vector. We know our algorithm is more effective in case of continuous GOB. The results show more significant improvement than many temporal concealment methods such as MVRI (Motion Vector Rational Interpolation) or existing error concealment using data hiding.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.1B
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• pp.1-6
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• 2011

We have considered fast handoff algorithms to support seamless streaming in wireless LANs. It is impossible to provide seamless streaming service while moving within wireless LANs, In this paper, we proposed a new handoff algorithm where the critical value for handoff can be adjusted according to peripheral wireless circumstances. This algorithm can prevent an unnecessary scanning job and save handoff delay time through the active scanning procedure to the specific channel groups. Also, we evaluated the handoff performance of our proposed algorithm, and compared it with the performance of the existing wireless LAN. We can see that the performance with our proposal is better than that of the general wireless LAN.

• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.32-36
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• 2004

In order to achieve high performance vector control, it is essential to measure accurate ac current. The errors generated from current path are inevitable, and they could be divided into two categories: offset error and scaling error. The current data including these errors cause periodic speed ripples which are one and two times of stator electrical frequency respectively. Since these undesirable ripples bring about bad influences to motor driving system, a compensation algorithm must be needed in the control algorithm of the motor drive. In this paper, a new compensation algorithm is proposed. The signal of the integrator output of the d-axis current regulator is chosen and processed to compensate the current measurement errors. The compensation of the current measurement errors is easily implemented to smooth the signal of the integrator output of the d-axis current regulator by subtracting the DC offset value or rescaling the gain of the hall sensor. Therefore, the proposed algorithm has several features: the robustness of the variation of the mechanical parameters, the application of the steady and transient state, the easy implementation, and less computation time.

• Journal of the Korea Society of Computer and Information
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• v.13 no.6
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• pp.195-201
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• 2008

We proposed that is suitable network environment and wire/wireless communication network, easy of implementation, security level preservation, scalable & reconfigurable to TCP/IP protocol architecture to implement suitable smart card MS-Serpent cryptographic algorithm for smart card by hardware base chip level that software base is not implement. Implemented MT-Serpent cryptosystem have 4,032 in gate counter and 406.2Mbps@2.44MHz in throughput. Implemented MS-Serpent cryptographic algorithm strengthens security vulnerability of TCP/IP protocol to do to rescue characteristic of smart card and though several kind of services are available and keep security about many user in wire/wireless environment, there is important purpose.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.77-80
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• 2013

SURF algorithm is an algorithm to extract feature points and to generate descriptors from input images. It is robust to change of environment such as scale, rotation, illumination and view points. Because of these features, it is used for many image processing applications such as object recognition, constructing panorama pictures and 3D image restoration. But there is disadvantage for real time operation because many recognition algorithms such as SURF algorithm requires a lot of calculations. In this paper, we propose a design of feature extractor and descriptor generator based on SURF for high memory efficiency. The proposed design reduced a memory access and memory usage to operate in real time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.163-164
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• 2015

In order to decode the bar code image binarization process is indispensable. The traditional binarization method is a global threshold binarization and local threshold binarization. Global threshold binarization method using a single threshold. In some cases there is a blur, or if the brightness is different from the bar code image. Therefore, binary pattern information is not retained. Local threshold method is binaized pattern information is maintained but processing speed is slow than global threshold binarization. The algorithm for solving this problem, there is modified binary algorithm. In this paper, we proposed hardware IP implemented by Vivado of modified binary algorithm.

• Journal of the Korea Society of Computer and Information
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• v.21 no.11
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• pp.31-38
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• 2016

In this paper, we propose multi-scale infrared target detection algorithm with varied filter size using integral image. Filter based target detection is widely used for small target detection, but it doesn't suit for large target detection depending on the filter size. When there are multi-scale targets on the sky background, detection filter with small filter size can not detect the whole shape of the large targe. In contrast, detection filter with large filter size doesn't suit for small target detection, but also it requires a large amount of processing time. The proposed algorithm integrates the filtering results of varied filter size for the detection of small and large targets. The proposed algorithm has good performance for both small and large target detection. Furthermore, the proposed algorithm requires a less processing time, since it use the integral image to make the mean images with different filter sizes for subtraction between the original image and the respective mean image. In addition, we propose the implementation of real-time embedded system using FPGA.