• Korean Journal of Metals and Materials
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• v.46 no.11
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• pp.762-769
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• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.513-516
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• 1987

Hydrogenated amorphous silicon (a-Si:H) films have been deposited, for thye first time, by a remote plasma chemical vapor deposition. The hydrogen radical play a important role to control the deposition rate, The bonded hydrogen content to silicon is independent of hydrogen partial pressure in the plasma. Optical gap of deposited a-Si:H lies between 1.7eV and 1.8eV and all samples have sharp absorption edge. B-doped a-Si:H films by a RPECVD has a high doping efficiency compared with plasma CVD. The Fermi level of 100ppm B-doped film lies at 0.5eV above valence band edge.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.202-205
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• 2002

Polycrystalline silicon thin film transistors (poly-Si TFTs) are used in a wide variety of applications, and will figure prominently future high-resolution, high-performance flat panel display technology However, it was very difficult to fabricate high performance poly-Si TFTs at a temperature lower than 300$^{\circ}C$ for glass substrate. Conventional process on a glass substrate were limited temperature less than 600$^{\circ}C$ This paper proposes a high temperature process above 750$^{\circ}C$ using a flexible molybdenum substrate deposited hydrogenated amorphous silicon (a-Si:H) and than crystallized a rapid thermal processor (RTP) at the various temperatures from 750$^{\circ}C$ to 1050$^{\circ}C$. The high temperature annealed poly-Si film illustrated field effect mobility higher than 30 $\textrm{cm}^2$/Vs, achieved I$\sub$on//I$\sub$off/ current ratio of 10$^4$ and crystall volume fraction of 92%. In this paper, we introduce the new TFTs Process as flexible substrate very promising roll-to-roll process, and exhibit the properties of high temperature crystallized poly-Si Tn on molybdenum substrate.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.244.2-244.2
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• 2016

폴리 실리콘 박막은 저온 안정성, 산화 안정성, 가스 투과성 및 전기재료로서의 우수한 물성 때문에 산업에서 계속적으로 넓게 쓰이고 있다. 특히 최근 높은 색 재현율과 고화질로 각광을 받고 있는 능동형 유기발광 다이오드 (AMOLED)를 위한 Thin Film Transistor (TFT)는 신뢰성 및 우수한 특성이 요구되기 때문에 반드시 폴리실리콘 TFT가 적용되어야 한다. 이러한 이유 때문에 아모포스 실리콘을 폴리실리콘으로 결정화 시키는 방법들이 많이 연구 되어져왔다. 이 연구에서는 아모포스 실리콘 박막을 고품질의 폴리실리콘 박막으로 제조하기 위해, 기판에 positive DC 전압을 펄스 형태로 인가함으로써, 기판에 입사되는 전자를 이용한 열처리 방법을 사용하였다. 열처리 온도는 기판에 들어오는 current값을 조절함으로써 제어할 수 있었다. 열처리를 위해 사용 된 수소화 된 아모포스 실리콘은 Low Pressure Chemical Vapor Deposition (LPCVD)장비로 530도에서 증착 되었으며, 이러한 아모포스 실리콘 박막은 공정시간 60 s 이내에 샘플 표면온도가 600도 이상으로 증가함으로써 균일한 폴리실리콘 막으로 제조 되었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04a
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• pp.70-71
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• 2009

Photoelectric characteristics of a hydrogenated amorphous silicon thin film transistor(a-Si:H TFT) were obtained for the illumination from various backlight sources and the results were compared and analyzed in terms of the photon energy spectral characteristics of the backlights obtained from the integration of the multiplication of the photon energy and the spectral intensity at etch wavelength. It was possible to conclude that the absorption of illuminated backlight to a-Si:H layer and the generation of electrons and holes are mainly carried out at the wavelength less than 500nm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.55-56
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• 2008

The photo leakage currents of a conventional hydrogenated amorphous silicon(a-Si:H) thin film transistor(TFT) were investigated and analyzed in the case of illumination from various lightsources such as halogen lamp, cold cathode fluorescent lamp(CCFL) backlight, and white light emitting diode(LED) backlight The photo leakage characteristics showed the apparent differences in the leakage level and in the $I_{on}/I_{off}$ ratio in spite of the similar luminances of light sources. This leakage level is expected to be related to the wavelength of the lowest intensity peak from spectral analysis of light sources.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.9
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• pp.844-847
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• 2008

The photo leakage currents of a conventional hydrogenated amorphous silicon(a-Si:H) thin film transistor(TFT) were investigated and analyzed in case of illumination from various light sources such as halogen lamp, cold cathode fluorescent lamp(CCFL) backlight, and white light emitting diode(LED) backlight. The photo leakage characteristics showed the apparent differences in the leakage level and in the $I_{on}/I_{off}$ ratio in spite of the similar luminances of light sources. This leakage level is expected to be related to the wavelength of the lowest intensity peak from the spectral characteristics of light sources.

• Transactions on Electrical and Electronic Materials
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• v.12 no.3
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• pp.89-92
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• 2011

Hydrogenated amorphous carbon (a-C:H) films were deposited by plasma enhanced chemical vapor deposition on silicon substrates. a-C:H thin film was irradiated to a typical He-Cd laser to study its emitting properties. The photoluminescence (PL) intensity during the irradiation achieved a maximum value when 2,000 seconds elapsed. Fourier transform infrared measurement revealed a-C:H thin film suffered transformation from a polymer-like to graphite-like phase during laser irradiation. Thermal annealing was done at various temperatures, ranging from room temperature to $400^{\circ}C$ in the atmosphere, to investigate structural changes in a-C:H film by heat generation during the emission. PL intensity of a-C:H thin film increased 1.5 times without apparent structural change, as annealing temperature increased up to $200^{\circ}C$. However, a-C:H film above $200^{\circ}C$ exhibited significant decrease of PL accompanying dehydrogenation. This led to a red shift of the PL peak.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1514-1516
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• 1999

This paper covers our efforts to improve the low carrier mobility and light instability of hydrogenated amorphous silicon (a-Si:H) films with microcrystalline silicon $({\mu}c-Si)$ films. We successfully prepared ${\mu}c-Si$ films on $CaF_2$/glass substrate by decomposition of $SiH_4$ in RPCVD system. The $CaF_2$ films on glass served as a seed layer for ${\mu}c-Si$ film growth. The XRD analysis on $CaF_2$/glass illustrated a (111) preferred $CaF_2$ grains with the lattice mismatch less than 5 % of Si. We achieved ${\mu}c-Si$ films with a crystalline volume fraction of 61 %, (111) and (220) crystal orientations. grain size of $706\AA$, activation energy of 0.49 eV, and Photo/dark conductivity ratio of 124. By using a $CaF_2$/glass structure. we were able to achieve an improved ${\mu}c-Si$ films at a low substrate temperature of $300^{\circ}C$.

• Korean Journal of Metals and Materials
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• v.47 no.5
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• pp.322-329
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• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.