• 제목/요약/키워드: hot electron degradation

검색결과 40건 처리시간 0.026초

AlZnMgCu0.5 합금의 Electron Beam 용접성에 관한 연구 (Investigations on electron beam weldability of AlZnMgCu0.5 alloys)

  • 배석천
    • Journal of Welding and Joining
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    • 제15권4호
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    • pp.166-177
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    • 1997
  • The high strength AlZnMgCu0.5 alloy is a light metal with good age hardenability, and has a high tensile and yielding strength. Therefore, it can be used for structures requiring high speciple strength. Even though high strength AlZnMgCu alloy has good mechanical properties, it has a lot of problems in TIG and MIG welding processes. Since lots of high heat absorption is introduced into the weldment during TIG and MIG processes, the microstructural variation and hot cracks take place in heat affected zone. Therefore, the mechanical properties of high strength AlZnMgCu0.5 alloy can be degraded in weldment and heat affected zone. Welding process utilizing high density heat source such as electron beam should be developed to reduce pore and hot cracking, whichare usually accompanied by MIG and TIG welding processes. In this work, electron beam welding process were used with or without AlMg4.5Mn as filler material to avoid the degradation of mechanical properties. Mechanical and metallurgical characteristics were also studied in electron beam weldment and heat affected zone. Moreover hot cracking mechanism was also investigated.

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양 방향 Hot Carrier 스트레스에 의한 PMOSFET 노쇠화 (PMOSFET degradation due to bidirectional hot carrier stress)

  • 김용택;김덕기;유종근;박종태;박병국;이종덕
    • 전자공학회논문지A
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    • 제32A권6호
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    • pp.59-66
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    • 1995
  • The hot electron induced effective channel length modulation (${\Delta}L_{H}$) and HEIP characteristics in PMOSFET's after bidirectional stress are presented. Trapped electron charges in gate oxide and lateral field are calculated from the gate current model, and ${\Delta}L_{H}$(${\Delta}L_{HD},\;{\Delta}L_{HS}$) is calculated using trapped electron charges and lateral field. It has been found that ${\Delta}I_{d}$and ${\Delta}L_{H}$ are more affected by the stress order (Forward-Reverse of Reverse or Reverse-Forward) than the stress direction, and they vary logarithmically with the stress time. In contrast, ${\Delta}V_{t}$ and ${\Delta}V_{pt}$ are more affected by the stress direction thatn the stress order. The correlation between ${\Delta}V_{pt}$ and the stress time can be explanined as the following polynomial functin: ${\Delta}V_{pt}$=AT$^{n}$. It has also been shown that PMOSFET degradation is related with the gate current and the effects of ${\Delta}V_{pt}$ is the most significant.

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미세소자에서 누설전류의 분석과 열화 (Analysis and Degradation of leakage Current in submicron Device)

  • 배지철;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1996년도 추계학술대회 논문집
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    • pp.113-116
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    • 1996
  • The drain current of the MOSFET in the off state(i.e., Id when Vgs=0V) is undesired but nevertheless important leakage current device parameter in many digital CMOS IC applications (including DRAMs, SRAMs, dynamic logic circuits, and portable systems). The standby power consumed by devices in the off state have added to the total power consumed by the IC, increasing heat dissipation problems in the chip. In this paper, hot-carrier-induced degra- dation and gate-induced-drain-leakage curr- ent under worse case in P-MOSFET\`s have been studied. First of all, the degradation of gate-induced- drain-leakage current due to electron/hole trapping and surface electric field in off state MOSFET\`s which has appeared as an additional constraint in scaling down p-MOSFET\`s. The GIDL current in p-MOSFET\`s was decreased by hot-electron stressing, because the trapped charge were decreased surface-electric-field. But the GIDL current in n-MOS77T\`s under worse case was increased.

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소자 레이아웃이 n-채널 MuGFET의 특성에 미치는 영향 (Effects of Device Layout On The Performances of N-channel MuGFET)

  • 이승민;김진영;유종근;박종태
    • 대한전자공학회논문지SD
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    • 제49권1호
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    • pp.8-14
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    • 2012
  • 전체 채널 폭은 같지만 핀 수와 핀 폭이 다른 n-채널 MuGFET의 특성을 측정 비교 분석하였다. 사용된 소자는 Pi-gate 구조의 MuGFET이며 핀 수가 16이며 핀 폭이 55nm인 소자와 핀 수가 14이며 핀 폭이 80nm인 2 종류의 소자이다. 측정 소자성능은 문턱전압, 이동도, 문턱전압 roll-off, DIBL, inverse subthreshold slope, PBTI, hot carrier 소자열화 및 드레인 항복전압 이다. 측정 결과 핀 폭이 작으며 핀 수가 많은 소자의 단채널 현상이 우수한 것을 알 수 있었다. PBTI에 의한 소자열화는 핀 수가 많은 소자가 심하며 hot carrier에 의한 소자열화는 비슷한 것을 알 수 있었다. 그리고 드레인 항복 전압은 핀 폭이 작고 핀 수가 많은 소자가 높은 것을 알 수 있었다. 단채널 현상과 소자열화 및 드레인 항복전압 특성을 고려하면 MuGFET소자 설계 시 핀 폭을 작게 핀 수를 많게 하는 것이 바람직하다.

NMOSFET의 Hot-Carrier 열화현상 (Hot-Carrier Degradation of NMOSFET)

  • 백종무;김영춘;조문택
    • 한국산학기술학회논문지
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    • 제10권12호
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    • pp.3626-3631
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    • 2009
  • 본 논문에서는 아날로그 회로에 사용되는 NMOSFET에 대한 Hot-Carrier 열화특성을 조사하였다. 여러 값을 갖는 게이트 전압으로 스트레스를 인가한 후, 소자의 파라미터 열화를 포화 영역에서 측정하였다. 스트레스 게이트 전압의 범위에 따라 계면 상태(interface state) 뿐 아니라 전자와 정공의 포획이 드레인 근처 게이트 산화막에서 확인되었다. 그리고 특히 낮은 게이트 전압의 포화영역에서는 정공의 포획이 많이 발생하였다. 이러한 전하들의 포획은 전달 컨덕턴스 ($g_m$) 및 출력 컨덕턴스 ($g_{ds}$)의 열화의 원인이 된다. 아날로그 동작 범위의 소자에서 파라미터 열화는 소자의 채널 길이에 매우 민감하게 반응한다. 채널길이가 짧을수록 정공 포획이 채널 전도도에 미치는 영향이 증가하게 되어 열화가 증가되었다. 이와 같이 아날로그 동작 조건 및 아날로그 소자의 구조에 따라 $g_m$$g_{ds}$의 변화가 발생하므로 원하는 전압 이득($A_V=g_m/g_{ds}$)을 얻기 위해서는 회로 설계시 이러한 요소들에 대한 고려가 필요하다.

Research for Hot Carrier Degradation in N-Type Bulk FinFETs

  • Park, Jinsu;Showdhury, Sanchari;Yoon, Geonju;Kim, Jaemin;Kwon, Keewon;Bae, Sangwoo;Kim, Jinseok;Yi, Junsin
    • 한국전기전자재료학회논문지
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    • 제33권3호
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    • pp.169-172
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    • 2020
  • In this paper, the effect of hot carrier injection on an n-bulk fin field-effect transistor (FinFET) is analyzed. The hot carrier injection method is applied to determine the performance change after injection in two ways, channel hot electron (CHE) and drain avalanche hot carrier (DAHC), which have the greatest effect at room temperature. The optimum condition for CHE injection is VG=VD, and the optimal condition for DAHC injection can be indirectly confirmed by measuring the peak value of the substrate current. Deterioration by DAHC injection affects not only hot electrons formed by impact ionization, but also hot holes, which has a greater impact on reliability than CHE. Further, we test the amount of drain voltage that can be withstood, and extracted the lifetime of the device. Under CHE injection conditions, the drain voltage was able to maintain a lifetime of more than 10 years at a maximum of 1.25 V, while DAHC was able to achieve a lifetime exceeding 10 years at a 1.05-V drain voltage, which is 0.2 V lower than that of CHE injection conditions.

Preparation of C60 Nanowhiskers/WO3 Nanocomposites and Photocatalytic Degradation of Organic Dyes

  • Kim, Keun Hyung;Ko, Jeong Won;Ko, Weon Bae
    • Elastomers and Composites
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    • 제50권2호
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    • pp.126-131
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    • 2015
  • $C_{60}$ nanowhiskers were synthesized from $C_{60}$ by liquid-liquid interfacial precipitation (LLIP) using $C_{60}$-saturated toluene and isopropyl alcohol. The $WO_3$ nanoparticles were synthesized by adding $3.8{\times}10^{-4}$ mole amount of ammonium metatungstate hydrate ($H_{26}N_6O_{40}W_{12}{\cdot}H_2O$) to 500 ml of distilled water, and the resulting solution was heated on a hot plate for 4 h. The $C_{60}$ nanowhiskers/$WO_3$ nanocomposites were prepared with $C_{60}$ nanowhiskers and $WO_3$ nanoparticles in an electric furnace at $700^{\circ}C$ in an argon gas atmosphere for 2 h. The $C_{60}$ nanowhiskers/$WO_3$ nanocomposites were characterized by X-ray diffraction, scanning electron microscopy, and transmission electron microscopy. UV-vis spectroscopy was used to evaluate the performance of the $C_{60}$ nanowhiskers/$WO_3$ nanocomposites as a photocatalyst in the degradation of organic dyes, such as methylene blue (MB) and brilliant green (BG) under ultraviolet light (254 nm).

A Study on the Hot Carrier Effect Improvement by HLDBD (High-temperature Low pressure Dielectric Buffered Deposition)

  • Lee, Yong-Hui;Kim, Hyeon-Ho;Woo, Kyong-Whan;Kim, Hyeon-Ki;Yi, Jae-Young;Yi, Cheon-Hee
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -2
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    • pp.1042-1045
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    • 2002
  • The scaling of device dimension and supply voltage with high performance and reliability has been the main subject in the evolution of VLSI technology, The MOSFET structures become susceptible to high field related reliability problems such as hot-electron induced device degradation and dielectric breakdown. HLDBD(HLD Buffered Deposition) is used to decrease junction electric field in this paper. Also we compared the hot carrier characteristics of HLDBD and conventional.

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SC PMOSFET의 수평 전개 모델과 노쇠화 메카니즘 (Lateral Electric Field Model and Degradation Mechanism of surface-Channel PMOSFET's)

  • 양광선;박종태;김봉렬
    • 전자공학회논문지A
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    • 제31A권1호
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    • pp.54-60
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    • 1994
  • In this paper, we present the analytical models for the change of the lateral electric field distribution and the velocity saturation region length with the electron trapping of stressed SC-PMOSFET in the saturation region. To derive the hot-electron-induced lateral electric field of stressed SC-PMOSFET. Ko's pseudo two dimensional box model in the saturation region which illustrates the analysis of the velocity saturation region is modified under the condition of electron trapping in the oxide near the drain region. From the results, we have the following lateral electric field in the y-direction, that is, E(y) ES1satT.cosh(y/l) qNS1tT.sinh(y/l)/lCox. It is shown that the trapped electrons influence the field in the drain region. decreasing the lateral electric field. Calculated velocity saturaion length increases with the trapped electrons. increasing the drain current of stressed SCPMOSFET. This results well explain the HEIP phenomenon of PMOSFET's.

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고압 중수소 열처리 효과에 의해 조사된 수소 결합 관련 박막 게이트 산화막의 열화 (Hydrogen-Related Gate Oxide Degradation Investigated by High-Pressure Deuterium Annealing)

  • 이재성
    • 대한전자공학회논문지SD
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    • 제41권11호
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    • pp.7-13
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    • 2004
  • 두께가 약 3 nm 인 게이트 산화막을 갖는 P 및 NMOSFET를 제조하여 높은 압력 (5 atm.)의 중수소 및 수소 분위기에서 후속 열처리를 각각 행하여 중수소 효과(동위원소 효과)를 관찰하였다. 소자에 대한 스트레스는 -2.5V ≤ V/sub g/ ≤-4.0V 범위에서 100℃의 온도를 유지하며 진행되었다. 낮은 스트레스 전압에서는 실리콘 계면에 존재하는 정공에 의하여 게이트 산화막의 열화가 진행되었다. 그러나 스트레스 전압을 증가시킴으로써 높은 에너지를 갖는 전자에 의한 계면 결함 생성이 열화의 직접적인 원인이 됨을 알 수 있었다. 본 실험조건에서는 실리콘 계면에서 phonon 산란이 많이 발생하여 impact ionization에 의한 "hot" 정공의 생성은 무시할 수 있었다. 중수소 열처리를 행함으로써 수소 열처리에 비해 소자의 파라미터 변화가 적었으며, 게이트 산화막의 누설전류도 억제됨이 확인되었다. 이러한 결과로부터 impact ionization이 발생되지 않을 정도의 낮은 스트레스 전압동안 발생하는 게이트 산화막내 결함 생성은 수소 결합과 직접적인 관계가 있음을 확인하였다.