• 대한수학교육학회지:수학교육학연구
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• 제9권2호
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• pp.383-404
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• 1999

This study began with an epistemological question about the nature of mathematical cognition in relation to the learner's activity. Therefore, by examining Piaget's 'reflective abstraction' theory which can be an answer to the question, we tried to get suggestions which can be given to the mathematical education in practice. 'Reflective abstraction' is formed through the coordination of the epistmmic subject's action while 'empirical abstraction' is formed by the characters of observable concrete object. The reason Piaget distinguished these two kinds of abstraction is that the foundation for the peculiar objectivity and inevitability can be taken from the coordination of the action which is shared by all the epistemic subjects. Moreover, because the mechanism of reflective abstraction, unlike empirical abstraction, does not construct a new operation by simply changing the result of the previous construction, but is forming re-construction which includes the structure previously constructed as a special case, the system which is developed by this mechanism is able to have reasonability constantly. The mechanism of the re-construction of the intellectual system through the reflective abstraction can be explained as continuous spiral alternance between the two complementary processes, 'reflechissement' and 'reflexion'; reflechissement is that the action moves to the higher level through the process of 'int riorisation' and 'thematisation'; reflexion is a process of 'equilibration'between the assimilation and the accomodation of the unbalance caused by the movement of the level. The operational learning principle of the theorists like Aebli who intended to embody Piaget's operational constructivism, attempts to explain the construction of the operation through 'internalization' of the action, but does not sufficiently emphasize the integration of the structure through the 'coordination' of the action and the ensuing discontinuous evolvement of learning level. Thus, based on the examination on the essential characteristic of the reflective abstraction and the mechanism, this study presents the principles of teaching and learning as following; $\circled1$ the principle of the operational interpretation of knowledge, $\circled2$ the principle of the structural interpretation of the operation, $\circled3$ the principle of int riorisation, $\circled4$ the principle of th matisation, $\circled5$ the principle of coordination, reflexion, and integration, $\circled6$ the principle of the discontinuous evolvement of learning level.

• Journal of information and communication convergence engineering
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• 제11권2호
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• pp.112-117
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• 2013

In order to reuse a register transfer level (RTL)-based IP block, it takes another architectural exploration in which the RTL will be put, and it also takes virtual platforms to develop the driver and applications software. Due to the increasing demands of new technology, the hardware and software complexity of organizing embedded systems is growing rapidly. Accordingly, the traditional design methodology cannot stand up forever to designing complex devices. In this paper, I introduce an electronic system level (ESL)-based approach to designing complex hardware with a derivative of SystemVerilog. I adopted the concept of reuse with higher levels of abstraction of the ESL language than traditional HDLs to design multiplication server farms. Using the concept of ESL, I successfully implemented server farms as well as a test bench in one simulation environment. It would have cost a number of Verilog/C simulations if I had followed the traditional way, which would have required much more time and effort.

• 전자공학회논문지C
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• 제34C권6호
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• pp.1-10
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• 1997

By considering low power design at higher levels of abstraction rather than at lower levels of abstraction, we can apply various transformation techniques to a system design with wider view and obtain much more effective power reduction with less cost and effort. In this paper, a transformation technique, called power - conscious loop folding is proposed for high level synthesis of a low power system.Our work is focused on reducing the power consumed by functional units in adata path dominated circuit through the decrease of switching activity. Te transformation algorithm has been implemented and integrated into HYPER, a high level synthesis system for experiments. In our experiments, we could achieve a pwoer reduction of up to 50% for data path dominated circuits.

• 한국정보과학회논문지:소프트웨어및응용
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• 제28권5호
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• pp.389-401
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• 2001

본 논문에서는 MPEG형식의 영화 데이터를 대상으로 폭발 장면 자동 추출을 위한 저급 수준 비디오 내용정보의 추상화 방법을 제안하고, 실제 구현을 통하여 그 유용성을 보인다. 제안한 추상화 방법은 폭발시 발생하는 불꽃의 색이 노란색 톤을 가진다는 사실과, 불꽃이 나타나는 프레임은 같은 tit에 속하는 이웃한 프레임과는 화면 구성이 달라지게 되므로 움직임 에너지 값이 커지게 된다는 사실을 바탕으로 한다. 이를 위해서 샷 단위의 인덱싱을 자동적으로 수행하고 각 샷의 첫 번째 프래임을 키 프레임으로 하다. 이를 위해서 샷 단위의 인덱싱을 자동적으로 수행하고 각 샷의 첫 번째 프레임을 키 프레임으로 선택한 후 영역별 주 색깔(Dominant Color)를 추출한다. 이때 색 공간은 양자화를 통한 512색 중 노란색 톤을 가지는 48 색 범위로 정의한다. 이후 매 샷마다 첫 번째 프레임과 이웃한 프레임의 에지 이미지(Edge Image)를 추출하여 이들의 차이로써 움직임 에너지(Motion Energy)를 얻는다. 이 두 가지 정보, 즉 노란색 톤을 가지는 색 정보와, 같은 장면 내의 다른 샷의 움직임 에너지에 비해 큰 값의 움직임 에너지를 갖는 샷을 폭발장면이 포함된 장면으로 검출한다. 실험 결과에 의하면 검색 결과는 주어진 임계값에 의존적이나, Recall과 Precision에서 80% 이상의 검출률을 보이고 있다. 그러나 일반적인 폭발 장면은 찾기에는 노란색 불꽃을 보이지 않는 예외적인 경우가 발생하여 이를 추출하는데 어려움이 있었다. 앞으로 이러한 문제점등은 기존의 오디오 정보를 이용한 폭발 장면 검출 방법과 함께 이용함으로써 해결되어질 수 있을 것이다.

• 융합신호처리학회논문지
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• 제11권2호
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• pp.177-182
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• 2010

시스템수준 설계방법론에서 널리 사용하고 있는 설계흐름도는 시스템명세, 시스템수준의 하드웨어/소프트웨어 분할, 하드웨어/소프트웨어 통합설계, 가상 또는 물리적 프로토타입을 이용한 통합검증, 시스템통합으로 구성된다. 시스템의 하드웨어 구성요소를 개발하는 과정에서 이전까지는 디자인단계가 많은 시간 및 노력을 요구하는 단계였지만, 현재에는 설계한 디자인의 기능적 검증단계가 중요 요소로 간주되고 있다. 본 논문에서는 시스템수준 설계언어인 SystemC 기반의 테스트벤치 구조를 이용하여 Verilog HDL로 설계된 하드웨어 구성요소의 올바른 동작여부를 판별하는 기능검증시스템을 설계하였다. 설계된 기능검증시스템에서 SystemC 모듈의 멤버 변수와 Verilog 모듈의 와이어 및 레지스터 변수간의 데이터 전달은 본 논문에서 정의되는 SystemC 사용자 정의 통신채널을 통하여 이루어진다. 제안된 기능검증시스템을 UART에 적용하여 올바른 동작여부를 판별하였다. 본 논문의 기능검증시스템 설계에 사용된 SystemC는 C++기반의 하드웨어 모델링용 클래스 라이브러리를 제공하므로 RT 수준보다 높은 추상화수준에서 소프트웨어와 하드웨어 또는 이 둘을 결합한 시스템수준의 모델링을 단일 언어와 환경에서 설계할 수 있는 이점이 있다. 또한 기능검증시스템 설계에 작성된 SystemC 모듈 코드들은 부분적인 코드 수정 후 다른 하드웨어 구성요소의 기능을 검증하는데 재사용할 수 있는 이점이 있다.

• International journal of advanced smart convergence
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• 제5권3호
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• pp.8-15
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• 2016

In recent years, one of deep learning models called Deep Belief Network (DBN) which formed by stacking restricted Boltzman machine in a greedy fashion has beed widely used for classification and recognition. With an ability to extracting features of high-level abstraction and deal with higher dimensional data structure, this model has ouperformed outstanding result on image and speech recognition. In this research, we assess the applicability of deep learning in dna classification level. Since the training phase of DBN is costly expensive, specially if deals with DNA sequence with thousand of variables, we introduce a new encoding method, using decimal-binary vector to represent the sequence as input to the model, thereafter compare with one-hot-vector encoding in two datasets. We evaluated our proposed model with different contrastive algorithms which achieved significant improvement for the training speed with comparable classification result. This result has shown a potential of using decimal-binary vector on DBN for DNA sequence to solve other sequence problem in bioinformatics.

• Journal of Computing Science and Engineering
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• 제2권4호
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• pp.340-356
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• 2008

The cognitive constraints of the human mind must drive the decisions in architecture and methodology design in order that the systems we build are comprehensible. This paper presents a methodology for the design of time-triggered embedded systems that leads to understandable artifacts. We lift the design process to a higher level of abstractionto the level of computational components that interact solely by the exchange of messages. The time-triggered architecture makes it possible to specify the temporal properties of component interfaces precisely and provides temporally predictable message communication, such that the precise behavior of a large design can be studied in the early phases of a design on the basis of the component interface specifications. This paper shows how the cognitive simplification strategies of abstraction, partitioning and segmentation are supported by the time-triggered architecture and its associated design methodology to construct evolvable embedded systems that can be readily understood and modified.

• 대한수학교육학회지:수학교육학연구
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• 제8권2호
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• pp.485-494
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• 1998

This study is on the theory of Piaget's reflective abstraction and the mechanism of the development of knowledge and the history of algebra and its application to understand the difficulties that many students have in learning algebra. Piaget considers the development of knowledge as a linear process. The stages in the construction of different forms of knowledge are sequential and each stage begins with reorganization. The reorganization consists of the projection onto a higher level from the lower level and the reflection which reconstructs and reorganizes within a lager system that is transferred by profection. Piaget shows that the mechanisms mediating transitions from one historical period to the next are analogous to those mediating the transition from one psychogenetic stage to the next and characterizes the mechanism as the intra, inter, trans sequence. The historical development of algebra is characterized by three periods, which are intra inter, transoperational. The analysis of the history of algebra by the mechanism explains why the difficulties that students have in learning algebra occur and shows that the roles of teachers are important to help students to overcome the difficulties.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1339-1342
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• 2002

It is difficult to design system software to meet a better separation of concerns, which can provide a number of benefits such as adaptability, extensibility, and modularity in the design and implementation. During design, some aspectual properties, such as synchronization, scheduling, performance and fault tolerance, crosscut the basic functionalities of the system software. By separating functional components from the different aspectual components of the system software in the design, we can provide a better generic design model of system software. Aspect-Oriented Programming is a methodology that aims at separating components and aspects from the early stages of the software life cycle, and using techniques to combining them together at the implementation phase. In this paper we discuss an aspect-oriented framework that can simplify system software design and implementation by expressing it at a higher level of abstraction. Our work concentrates on how to achieve a higher separation of aspectual components, functional components, and layers from each other. Our goal is to achieve a better design model for implementing system software in terms of modularity, reusability and adaptability.

• 전자공학회논문지C
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• 제34C권5호
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• pp.1-17
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• 1997

With the increasing performance and density of VLSI scircuits as well as the popularity of portable devices such as personal digital assitance, power consumption has emerged as an important issue in the design of electronic systems. Low power design techniqeus have been pursued at all design levels. However, it is more effective to attempt to reduce power dissipation at higher levels of abstraction which allow wider view. In this paper, we propose a simultaneous scheduling and binding scheme which increases the correlation between cosecutive inputs to an operation so that the switched capacitance of execution units is reduced in datapath-dominated circuits. The proposed method is implemented and integrated into the scheduling and assignment part of HYPER synthesis environment. Compared with original HYPER synthesis system, average power saving of 23.0% in execution units and 14.2% in the whole circuits, ar eobtained for a set of benchmark examples.