Low power high level synthesis by increasing data correlation

데이타 상관 증가에 의한 저전력 상위 수준 합성

With the increasing performance and density of VLSI scircuits as well as the popularity of portable devices such as personal digital assitance, power consumption has emerged as an important issue in the design of electronic systems. Low power design techniqeus have been pursued at all design levels. However, it is more effective to attempt to reduce power dissipation at higher levels of abstraction which allow wider view. In this paper, we propose a simultaneous scheduling and binding scheme which increases the correlation between cosecutive inputs to an operation so that the switched capacitance of execution units is reduced in datapath-dominated circuits. The proposed method is implemented and integrated into the scheduling and assignment part of HYPER synthesis environment. Compared with original HYPER synthesis system, average power saving of 23.0% in execution units and 14.2% in the whole circuits, ar eobtained for a set of benchmark examples.