• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2641-2644
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• 2003

Recently, TRAO Taeduk Radio Astronomy Observatory is developing wide-band digital spectrometer for radio astronomy, which will be used as back-end signal processing unit of Dual channel SIS receiver. So in this paper, we performed development of high speed digitizing sampler for the wide-band digital autocorrelator, which can perform sampling and quantization on pseudo-random gaussian noise with the maximum conversion speed of 1.5 Gsps..

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.6
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• pp.1009-1018
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• 2017

We developed new Digital Sampler for KVN(: Korean VLBI Network). The sampler has 1024MHz sampling frequency with 2bits/sample. The sampler's input reference frequencies are 1pps(: pulse per second) and 10MHz, also UTC(: Universal Time Coordinated) time information out with 1PPS signal, synchronized. The output of sampling data is adapted VSI(: VLBI Standard Interface) specification including the time information. In order to confirm the performance of the sampler, we carried out the astronomical radio observation test in Ulsan Radio Observatory of KVN. It was confirmed the stable performance. In this paper, We introduce the new developed sampler and present the observational test result.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.83-86
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• 2003

This paper is the research and development including the system design and the prototype system building of the wide-band digital autocorrelation spectrometer system for radio astronomy observation, which will be used as back-end signal processing unit of the Dual channel SIS receiver at Taeduk Radio Astronomy Observatory. So in this paper. we performed development of the high speed digitizing sampler, the circular memory buffer, and the correlator module for the 400MHz wide-band digital autocorrelator.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.12 s.354
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• pp.9-15
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• 2006

In this paper, signal processing techniques for noncoherent impulse-radio-based UWB (IR-UWB) communication system are proposed to provide system implementation of low power consumption and low complexity. The proposed system adopts a simple modulation technique of OOK (on-oft-keying) and noncoherent signal detection based on signal amplitude. In particular, a technique of a novel high speed digital sampler using a stable, lower reference clock is developed to detect nano-second pulses and recover digital signals from the pulses. Also, a 32 bits Turyn code for data frame synchronization and a convolution code as FEC are applied, respectively. To verify the proposed signal processing techniques for low power, low complexity noncoherent IR-UWB system, the proposed signal processing technique is implemented in FPGA and then a short-range communication system for wireless transmission of high quality MP3 data is designed and tested.

• Publications of The Korean Astronomical Society
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• v.19 no.1
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• pp.101-107
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• 2004

This paper describes the digital back-end system for getting the data to analyze the user observation mode by digitalize the analog data after receiving the space radio using the radio telescope, The received analog data will be digitalized by high-speed sampler with 1 Gsps for 4 channel frequency band of millimeter wave, and the digital data will be transported through the fiber-optic digital transmission system and WDM(wavelength division multiplex) to observation building, The wideband digital FIR(Finite Impulse Response) filters analyze the data for user observation mode to record the data in high-speed recorder with 1 Gbps. In this paper, we introduce the overall system configuration and features combined by various information and communication technology in radio astronomy briefly, which will be adopted by KVN(Korean VLBI Network).

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.2
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• pp.455-458
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• 2011

4:10 deserializer is proposed to recover 1:10 serial data using 1/4-rate clock. And then, 1/4-rate CDR(Clock and Data Recovery) circuit was designed for SERDES of high-speed serial display interface. The reduction of clock frequency using 1/4-rate clocking helps relax the speed limitation when higher data transfer is demanded. This circuit is composed of 1/4-rate sampler, PEL(Phase Error Logic), Majority Voting, Digital Filter, DPC(Digital to Phase Converter) and 4:10 deserializer. The designed CDR has been designed in a standard $0.18{\mu}m$ 1P6M CMOS technology and the recovered data jitter is 14ps in simulation.

• Journal of IKEEE
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• v.8 no.2 s.15
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• pp.166-171
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• 2004

This paper describes a CMOS time to digital converter (TDC) that measures the interval between two signals and converts to a digital signal. There are various methods to measure the time interval. But several architectures have a limitation in resolution and in conversion time. Moreover, they have complex algorithms. But the proposed TDC circuit has achieved a high resolution (25ps) by using a high-speed digital sampler and simple algorithm. The sampler detects when input signals comes into the TDC and output is coded. The proposed multiphase clock generator was also implemented to achieve 25p resolution.

• Proceedings of the Korea Contents Association Conference
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• 2004.05a
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• pp.372-376
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• 2004

Digital memory circuits have been developed very fast according to the progress of semiconductor technology But It was very difficult to memorize a high frequency radio signal. Many years ago an analog loop was used for store of radio frequency signal, and the digital radio frequency memory was made to the development of wideband amplifier and high speed sampler. We present a design of wide-band DRFM using Johnson code and the simulation results with respect to the sampling speed. in this paper.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.5
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• pp.401-406
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• 2005

Digital memory circuits have been developed very fast according to the progress of semiconductor technology. But it was very difficult to memorize a wideband radio frequency signals. Many years ago, an analog frequency memory loop(FML) was used for store of radio frequency signal and the digital radio frequency memory was made according to the development of wideband amplifier and high speed sampler. We present a design of wideband digital radio frequency reproduction device using ladder circuit and the simulation results with respect to the sampling speed in this paper.

• Publications of The Korean Astronomical Society
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• v.21 no.2
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• pp.95-100
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• 2006

In this paper, we describe the radio astronomical data processing system implementation using Mark5B and its development. KASI(Korea Astronomy and Space Science Institute) is constructing the KVN (Korean VLBI Network) until the end of 2007, which is the first VLBI(Very Long Baseline Interferometery) facility in Korea and dedicated for the mm-wave VLBI observation. KVN will adopt the DAS (Data Acquisition System) consisting of digital filter with various function and 1Gsps high-speed sampler to digitize the radio astronomical data for analyzing on the digital filter system. And the analyzed data will be recorded to recorder up to 1Gbps data rates. To test this, we have implemented the system which is able to process 1Gbps data rates and carried out the data recording experiment.