• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.2
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• pp.68-79
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• 2003

We estimated harmonics on power system of AC railway based on quantitatively measured harmonics and investigated the need of facilities for harmonics reduction. In order to analysis harmonics which inflow into power system due to increase in collector voltages and harmonic currents generated from the train when the railway is in operation, the railway system Is sectioned into power supply, railway line, AT, sectioning Post and subsectioning post. For analysis of extension of currents resulting from the railway loads, PWM converter, VVVF inverter and the feeder system are modeled based on the dynamic node technique(DNT). In order to test the usefulness of the DNT for analysis of harmonic effects, the measured harmonic currents and harmonic magnification ratios at the S/K substation are compared with simulation results using DNT modelling, which include the results for two cases with and without filters for suppression of harmonic currents. When 8 cars(4M4T) are in operation, the total sum of harmonic currents resulting from the train at M and T phases, which inflow into the substation along with the railway line, is calculated. Using the harmonics analysis program for railway feeder system with these data, the total harmonic distortion factor(710) at the outgoing point of KEPCO substation is computed. The calculation shows that when the maximum THD at the receiving point of H/K substation was 0.0443% which is much lower than 1.5% which is the allowable value of KEPCO at 154kV as well as IEEE-519 above 132kV This result indicates that any measure for harmonics reduction in Incheon International Airport Railway is not needed.

• Journal of Power Electronics
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• v.10 no.4
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• pp.428-433
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• 2010

This paper proposes a harmonics reduction technique for the input currents of three phase PWM converters. The quality of the phase angle information on the utility voltage connected to the PWM converters affects their control performance. Under a distorted utility voltage, the extracted phase angle based on the synchronous reference frame PLL method is distorted. This causes large harmonics in the input currents of a PWM converter. In this paper, a harmonics reduction method that makes the input currents in the PWM converter sinusoidal even under distorted utility conditions is proposed. By the proposed method, without additional hardware, the THD (Total Harmonic Distortion) of the input currents can be readily limited to below 5% which is the harmonic current requirements of IEEE std. 519. Its validity is verified by simulations and experimental results.

• Proceedings of the KIPE Conference
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• 2013.11a
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• pp.254-255
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• 2013

In this paper, four switches three-phase Z-source dynamic harmonic filter is proposed. It has many advantages, such as reduction of the cost, switching loss and smaller drive circuit. In order to reduction harmonics, new PWM modulation technique with a variable index has been suggested that in comparison with a fixed index type has more capability. The paper presents an application of direct current control(DCC) method in Z-source dynamic harmonic filter to reduce the harmonics generated by the non-linear load. The experimental results will verify the validity of the proposed method.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.1988-1994
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• 2014

In a single-phase grid-connected power system consisting of a DC/DC converter and a DC/AC converter, the current drawn from renewable energy sources has a tendency to be pulsated and contains second-order frequency ripple components, which results in several drawback such as a power harvesting loss and a shortening of the energy source's life. This paper presents a new second-order harmonic current reduction scheme with a fast dc-link voltage loop for two-stage dc-dc-ac grid connected systems. In the frequency domain, an adequate control design is performed based on the small signal transfer function of a two-stage dc-dc-ac converter. To verify the effectiveness of proposed control algorithm, a 1 kW hardware prototype has been built and experimental results are presented.

• Proceedings of the KIEE Conference
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• 2006.11a
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• pp.234-236
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• 2006

In this paper, APF(Active Power Filter) will be treated in order to improve the output current distortion of the AC source. APF generates the harmonic current which contributes to a source side harmonic reduction. We can extract the compensating current of the parallel APF with phase transformations and the proposed current control method. Therefore, the calculation times is short and the control method is simple compared with conventional hysteresis methods. Experimental results verify that the system using the proposed method appers a good performance.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.276-280
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• 1998

This paper proposes a harmonic a harmonic reduction technique of the parallel-connected twelve-pulse thyristor rectifiers. The proposed system is an improvement over the diode rectifier system with an active interphase reactor [2]. In this scheme, a low KVA (0.15 Po (PU) ) active current source injects a triangular current into an interphase reactor of a twelve-pulse thyristor rectifier along the phase delay angle. The current injection results in near sinusoidal input current with less than 1% THD. Detailed analysis of the proposed scheme along scheme along with design equations is illustrated. Simulation results verify the concept.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.191-194
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• 2001

In this paper, we propose a series active power filter control method to compensate current harmonics and unbalanced source voltage. The system is composed of series active power filter and shunt passive filer that are tuned 5th and 7th harmonics. In this conventional system, series active power filter complements drawbacks of the shunt passive filter, namely improves harmonic compensation characteristics, and compensates unbalanced source voltage. In the proposed algorithm, compensation voltage for harmonic reduction is calculated by performance function, and compensation voltage for unbalanced source voltage is calculated in based on a synchronous reference frame. So, ultimate compensation voltage is sum of those two compensation voltages. By computer simulation, we verify the excellency of proposed method.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.4
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• pp.262-268
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• 2004

This thesis is proposing novel RPWM (Random PWM) techniques that can locate PWM pulse to do random. RPWM techniques to propose locates SVPWM (Space Vector PWM) pulse by number of each random and principle to locate of pulse applies different random function and locate pulse. For propriety verification of proposed techniques, achieve an simulation and experiment that use MATLAB/SIMULINK about proposed RPWM techniques algorithm and IGBT inverter composition that use DSP(TMS320C31). Specially, analyze harmonic spectra of inverter output current when the induction motor speed is more than 10,000 rpm, confirm that RPWM's effect in high speed degree appears. Proposed RPWM techniques propriety prove from reduction effect of harmonic magnitude that corresponds to an integer times of switching frequency.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1250-1252
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• 2003

This Paper presents Sigma-Delta Modulation(SDM) schemes to generate switching waveform for a high-power factor boost-type rectifier. The SDM scheme can be implemented by simple digital algorithm unlike conventional PWM schemes with several hardware, and has the characteristics of spectrum-spreading and noise-shaping effects, which are profitable in harmonic reduction of input current in the boost-type rectifier. The comparison results of their spectrum performances shows that the 1st-order SDM has better harmonic suppression effect than conventional PWM scheme and Dithered SDM scheme.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.556-559
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• 2001

In this paper, we proposed AC/DC boost converter to improve input current harmonic reduction in SMAW(shielded metal-arc welding). The proposed harmonic reduction with the boost converter design and the UC2854 integrated circuit which controls the converter, The topology of welding power supply is made of a pair of boost converter and welder half-bridge IGBT inverter. The voltage arc is modeled by a variable resistance in series with a voltage source. The results has been confirmed by PSIM simulation tool. The simulation results show that input at current is nearly sinusoidal with low harmonic contents and sinusoidal input current waveform at high power factor.