• Journal of Advanced Navigation Technology
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• v.12 no.5
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• pp.483-493
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• 2008

For effective wireless localization utilizing signal strength measurements based on IEEE 802.11 WLAN standard diversity of mobile hardware, characteristics of is one of the important problems to be considered for advanced location-based services. For improved accuracy regardless of a bias originating from the mobile hardware characteristics, this paper proposes a new localization algorithm, which is named as the hybrid Kriging algorithm. To evaluate the performance characteristics of the proposed algorithm, simulation and experiment results are illustrated. By the simulation and experiment result, the proposed algorithm is more accurate than the well-known location finger-print method given the same density of reference measurements.

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.7
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• pp.498-506
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• 2003

A computer vision system applied to an intelligent safety vehicle has been required to be worked on a small sized real time special purposed hardware not on a general purposed computer. In addition, the system should have a high reliability even under the adverse road traffic environment. This paper presents a design and an implementation of an onboard hardware system taking into account for high speed image processing to analyze a road traffic scene. The system is mainly composed of two parts: an early processing module of FPGA and a postprocessing module of DSP. The early processing module is designed to extract several image primitives such as the intensity of a gray level image and edge attributes in a real-time Especially, the module is optimized for the Sobel edge operation. The postprocessing module of DSP utilizes the image features from the early processing module for making image understanding or image analysis of a road traffic scene. The performance of the proposed system is evaluated by an experiment of a lane-related information extraction. The experiment shows the successful results of image processing speed of twenty-five frames of 320$\times$240 pixels per second.

• Journal of Korea Society of Digital Industry and Information Management
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• v.19 no.2
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• pp.69-78
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• 2023

In this paper, IO+5G dedicated hardware is developed and an AI device communication system equipped with a 5G is designed and tested. The AI device communication system equipped with a 5G receives the collected real-time images and the information collected from the IoT sensor in real time is to analyze the information and generates the risk detection events in the AI processing board. The event generated in the AI processing board creates a 5G channel in the dedicated hardware equipped with IO+5G. The created 5G channel delivers event video to the control video server. The 5G based dongle network enables faster data collection and more precise data measurement compared to wireless LAN and 5G routers. As a result of the experiment in this paper, the average test result of the 5G dongle network is about 51% faster than the Wi-Fi average test result in downlink and about 40% faster in uplink. In addition, when comparing the test result with terms of the 5G rounter to be set to 80% upload and 20% download, the average test result is that the 5G dongle network is about 11.27% faster when downloading and about 17.93% faster when uploading. when comparing the test result with terms of the the router to be set to 60% upload and 40% download, the 5G dongle network is about 11.19% faster when downlinking and about 13.61% faster when uplinking. Therefore, in this paper it describes that the developed 5G dongle network can improve the results by collecting data and analyzing it faster than wireless LAN and 5G routers.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.4
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• pp.765-772
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• 2020

Currently, general educational science experiment teaching aids cannot be accurately measured, and even MBL experiment teaching aids consist of sensor-oriented programs that is difficult to actively design experiments by focusing only on securing data. This study envisioned a science experiment parish system capable of software convergence experiment design through curriculum analysis, and designed the entire system architecture, frame, and mechanism of MBL-based science experiment parish system by supplementing the limitations of the existing experiment.

• Publications of The Korean Astronomical Society
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• v.23 no.2
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• pp.73-90
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• 2008

A software simulator is developed for verifying the VLBI Correlation Subsystem (VCS) trial product hardware. This software simulator includes the delay tracking, fringe rotation, bit-jump, FFT analysis, re-quantization, and auto/cross-correlation functions so as to confirm the function of the VCS trial product hardware. To verify the effectiveness of the developed software simulator, we carried out experiments using the simulation data which is a mixed signal with white noise and tone signal generated by software. We confirmed that the performance of this software simulator is similar as that of the hardware system. In case of spectral analysis and re-quantization experiment, a serious problem of the VCS hardware, which is not enough for expressing the data stream of FFT results specified in VCS hardware specification, was found by this software simulator. Through the experiments, the performance of software simulator was verified to be efficient. In future, we will improve and modify the function of software simulator to be used as a software correlator of Korea-Japan Joint VLBI Correlator (KJJVC).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.781-788
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• 2017

This paper proposes a new algorithm for comparing amplitude between multiple digital input signals and its digital logic architecture. After simultaneously comparing multiple inputs, the proposed algorithm can provide the information of the largest (or smallest) value among them by using a simple digital logic function. The drawback of the method is to increase hardware resource. To overcome this we propose a reuse method of the overlapped logic operation. The proposed method focuses on enhancing the operational clock frequency, in other words decreasing combinational delay time. After implementing the comparing method with HDL (hardware description language), we experiment on it with environment of Cyclone III EP3C40F324A7 FPGA of Altera Inc. In case of 4 input signals, it can increase the operational speed as mush as 1.66 times with 1.20 times the hardware resource. In case of 8, it can also have 2.29 times the clock frequency and 2.15 times the hardware resource.

• The Journal of Korea Robotics Society
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• v.15 no.4
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• pp.375-384
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• 2020

Today's robots consist of many hardware and software subsystems, depending on the functions needed for specific tasks. Integration of subsystems can require a great deal of effort, as both the communication method and protocol of the subsystem can vary. This paper proposes an expandable robotic system in which all subsystems are integrated under Robot Operation System (ROS) framework. To achieve this, the paper presents a software library, ROS_M, developed to implement the TCP/IP-based ROS communication protocol in different control environments such as MCU and RT kernel based embedded system. Then, all the subsystem including hardware can use ROS protocol consistently for communication, which makes adding new software or hardware subsystems to the robotic system easier. A latency measurement experiment reveals that the system built for loop control can be used in a soft real-time environment. Finally, an expandable mobile manipulator robot is introduced as an application of the proposed system. This robot consists of four subsystems that operate in different control environments.

• ETRI Journal
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• v.33 no.5
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• pp.731-740
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• 2011

Reconfigurable computing using a field-programmable gate-array (FPGA) device has become a promising solution in system design because of its power efficiency and design flexibility. To bring the benefit of FPGA to many application programmers, there has been intensive research about automatic translation from high-level programming languages (HLL) such as C and C++ into hardware. However, the large gap of syntaxes and semantics between hardware and software programming makes the translation challenging. In this paper, we introduce a new approach for the translation by using the widely used GCC compiler. By simply adding a hardware description language (HDL) backend to the existing state-of- the-art compiler, we could minimize an effort to implement the translator while supporting full features of HLL in the HLL-to-HDL translation and providing high performance. Our translator, called GCC2Verilog, was implemented as the GCC's cross compiler targeting at FPGAs instead of microprocessor architectures. Our experiment shows that we could achieve a speedup of up to 34 times and 17 times on average with 4-port memory over PICO microprocessor execution in selected EEMBC benchmarks.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.907-910
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• 1993

This paper describes the use of fuzzy control and decision making to simulate the control of traffic flow at an intersection. To show the value of fuzzy logic as an alternative method for control of traffic environments. A traffic environment includes the lanes to and from an intersection, the intersection, vehicle traffic, and signal lights in the intersection. To test the fuzzy logic controller, a computer simulation was constructed to model a traffic environment. A typical cross intersection was chosen for the traffic environment, and the performance of the fuzzy logic controller was compared with the performance of two different types of conventional control. In the hardware verifications, fuzzy logic was used to control acceleration of a model train on a circular path. For the software experiment, the fuzzy logic controller proved better than conventional control methods, especially in the case of highly uneven traffic flow between different directions. On the hardware si e of the research, the fuzzy acceleration control system showed a marked improvement in smoothness of ride over crisp control.

• The Journal of the Korea Contents Association
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• v.9 no.9
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• pp.51-59
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• 2009

A watermarking for copyright protection of digital contents for broadcasting have to be made for a real-time system. In this paper, we propose a real-time video watermarking system which is hardware-based watermarking system of SD/HD (standard definition/high definition) video with the STRATIX FPGA device from ALTERA. There was little visual artifact due to watermarking in subjective quality evaluation between the original video and the watermarked one in our experiment. Embedded watermark was extracted after robustness testscalled natural video attacks such as A/D (analog/digital) conversion. Our implemented watermarking hardware system can be useful in movie production and broadcasting companies that requires real-time contents protection systems.