• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.8
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• pp.42-45
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• 2002

A low power SDRAM output buffer with reduced power line noise and feedthrough current is presented. In multi I/O SDRAM output buffer, feedthrough current as well as the corresponding power dissipation are reduced utilizing proposed undershoot protection circuits. Ground bounce is minimized by the pull down driver using intelligent feedback scheme. Ground bounce noise is reduced by 66.3% and instantaneous and average power are reduced by 27.5% and 11.4%, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.134-138
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• 2008

We present a power gating turn-on mechanism that digitally suppresses ground-bounce noise in ultra-deep submicron technology. Initially, a portion of the sleep transistors are switched on in a pseudo-random manner and then they are all turned on fully when VVDD is above a certain reference voltage. Experimental results from a realistic test circuit designed in 65nm bulk CMOS technology show the potential of our approach.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.2 s.117
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• pp.199-205
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• 2007

In this paper, a novel hexagonal-shaped electromagnetic bandgap(EBG) power plane for the suppression of the ground bounce noise(GBN) in high-speed circuits is proposed. The proposed structure consists of hexagonal-shaped unit cells and detoured bridges connecting the unit cells. The hexagonal-shaped unit cells could omni-directionally suppress the GBN in digital circuits. The fabricated power plane's omni-directional -30 dB suppression bandwidth is from 330 MHz to 5.6 GHz. Then the proposed structure suppresses electromagnetic interference(EMI) caused by the GBN within the stopband. As a result, the proposed structure is expected to be conducive solving EMI problem in high-speed circuits.

• 한국ITS학회:학술대회논문집
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• v.2007 no.10
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• pp.334-337
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• 2007

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.149-153
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• 1999

As VLSI technology advances rapidly, the operating frequency of digital systems becomes very fast. In such a high-speed system, there are many factors that threaten signal integrity. The noise sources in digital system include the noises in power supply, ground bounce and packaging media and distortions on single and multiple transmission lines. This paper will present a technology survey useful in the design of Gigabit interconnection systems. Some case studies have been constructed which show the lossy transmission line effect of skin effect. dielectric loss, with backplane connectors using the theoretical and practical conditions.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.2 s.117
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• pp.206-212
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• 2007

In this paper, a novel power/ground plane using the hybrid-cell electromagnetic band-gap(EBG) structure is proposed for the wide-band suppression of the ground bound noise(GBN) or simultaneous switching noise(SSN). The -30 dB stopband of the proposed structure starts from a few hundred MHz where the GBN/SSN energy is dominant. The distinctive features of this new structure are the thin spiral strip line and hybrid-cells. They realize the enhanced inductance and the shorter period of the EBG lattice. As a result, the lower cut-off frequency and bandwidth of the -30 dB stopband becomes lower and wider, respectively. In addition, the proposed structure has smaller number of resonance modes between power/ground planes and performs a low EMI behavior compared with the reference board.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.340-343
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• 2002

Electromagnetic(EM) radiation problems and their possible solutions are addressed in this paper for the split power plane of high-speed digital systems. Stitching and decoupling capacitors are proved to be very effective fur reducing signal noise, ground bounce as well as electromagnetic radiation from the split power plane. Simulations based on 3D-Finite Difference Time Domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC main board

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.75-80
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• 2002

Signal integrity problems and their possible solutions are addressed in this paper for split power plane of high-speed digital systems. Stitching and decoupling capacitors are proved to be very effective for reducing signal noise, ground bounce as well as electromagnetic radiation from the split power plane. Simulations based on 3D-Finite Difference Time Domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC main board.