• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.12
• /
• pp.31-38
• /
• 2010

This paper presents the design of a graphic memory for QVGA-scale LCD Driver IC (LDI). The graphic memory is designed based on the pseudo-SHAM for the purpose of small area, and the memory cell structure is designed using a bit line partitioning method to improve sensing characteristics and drivabilties in the line-read operation. Also, a collision protection circuit using C-gate is designed to control collisions between read/write operations and self-refresh/line-read operations effectively. The graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and the operations of the graphic memory have been verified using Hspice. The results show that the bit-bitb line voltage difference, ${\Delta}V$ increases by 40%, the charge sharing time between bit and bitb voltages $T_{CHGSH}$ decreases by 30%, and the current during line-read decreases by 40%.

• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.589-590
• /
• 2008

This paper describes an improved design of graphic memory for QVGA ($320{\times}240\;RGB$) - scale 262k-color LCD Driver IC. A distributor block is adopted to reduce graphic RAM area, which is accomplished with 1/8 data lines of the previous structure. In line-read operation, the drivabilty of memory array cell is improved by partitioning a word line according to the row address. The proposed graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and verified using Hsim.

• ETRI Journal
• /
• v.25 no.5
• /
• pp.288-296
• /
• 2003

In this study, we present a 260k color TFT LCD driver chip set that consumes only 5 mW in the module, which has exceptionally low power consumption. To reduce power consumption, we used many power-lowering schemes in the logic and analog design. A driver IC for LCDs has a built-in graphic SRAM. Besides write and read operations, the graphic SRAM has a scan operation that is similar to the read operation of one row-line, which is displayed on one line in an LCD panel. Currently, the embedded graphic memory is implemented by an 8-transistor leaf cell and a 6-transistor leaf cell. We propose an efficient scan method for a 6-transistor embedded graphic memory that is greatly improved over previous methods. The proposed method is implemented in a 0.22 ${\mu}m$ process. We demonstrate the efficacy of the proposed method by measuring and comparing the current consumption of chips with and without our proposed scheme.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2012.11a
• /
• pp.197-199
• /
• 2012

Recently, a lot of general-purpose application programs in addition to graphic applications have been parallelized for boosting their performance using Graphic Processing Unit (GPU)'s excellent floating-point performance. In order to maximize the application performance on GPUs, optimizing the memory hierarchy and the on-chip caches such as the shared memory is essential. In this paper, we propose techniques to optimize the shared memory, and verify its effectiveness using a pattern matching application program.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.5
• /
• pp.802-807
• /
• 1990

In this thesis, we represent the study on the design and implementation of the hangul graphic board which generate bit map font data from the boundary information of korean or chines fonts. The implemented graphic board consists of a TMS34010 Graphic System Processor (GSP) and two TMS320C25 Digital Signal Processor (DSP), and there is shared memory which consists of two memory blocks with same address for which is possible parallel processing between two processors. And in using DSP, we propose an efficient algorithm for calculation of Bezier curve which require much times to calculate bit map data font from the boundary information.

• Proceedings of the KIEE Conference
• /
• 1987.07a
• /
• pp.216-220
• /
• 1987

A graphic display and operator console system is developed for monitoring the operation of power plant. It has multiprocessor structure using VME bus and common memory. The graphic monitoring system is applied to fault tolerant control system for enhancing reliability of boiler analog controller. As a result, it displays all the operating date as color graphic images with 14 pages. Moreover, it can transfer the operator commands to the other micro-processors through common memory.

• 제어로봇시스템학회:학술대회논문집
• /
• 1991.10a
• /
• pp.726-729
• /
• 1991

In this paper it is discussed about the program which makes automatically the preprocessing data on the graphic editor of PC monitor. Three kinds of colors are used in order to make know a boundary_element, in_element, out_element. By initial mesh generation, three kinds of elements are made; the element with three nodes, four nodes, five nodes. The node of boundary element draw a vertical line to the boundary. At that time the element with three nodes is removed and the element with four nodes is changed to the element with four nodes. The domain graphic on this paper is compose of piecewise curves which has many lines and a hole. The data of element is written on the memory of PC computer. The program controls the memory address according to the change of element's quantity; disappearance and addition of element. All this work is operated on the PC computer.

• 제어로봇시스템학회:학술대회논문집
• /
• 2003.10a
• /
• pp.2126-2130
• /
• 2003

In the integrated systems, that is integrated digital TV(DTV) internet and home automation, like home server, is needed integration of digital TV video signal and computer graphic signal. The graphic signal is operating at the high speed and has time-divide-stream. So the re-request of data is not easy at the time of error detection. therefore EDAC algorithm is efficient. In this paper, we show a scheme, that is integration of graphic and dtv format signal for DTV monitor display. This paper also presents the efficiency error detection auto correction(EDAC) for conversion of graphics signal to DTV video signal. A presented EDAC algorithms use the modified hamming code for enhancing video quality and reliability. A EDAC algorithm of this paper can detect single error, double error, triple error and more error for preventing from incorrect correction. And it is not necessary an additional memory. In this paper The comparison between digital TV video signal and graphic signal, a EDAC algorithm and a design of conversion graphic signal to DTV signal with EDAC function in DTV system is described.

• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.38 no.3
• /
• pp.217-227
• /
• 1989

A process control graphic system is proposed as an efficient tool for monitoring the operation of power plant. It uses the multi-processor structure with 60 Kbyte shared memory as an implemental type of the distributed computer system, so that it is flexible, functionally extensible, and applicable to real-time process. The shared memory is used as a real-time database handling the process values and operator's commands. The database files, generated by the user-interactive graphic editor developed for the system or text editor, have the characteristics of simplicity and user-friendliness. The process control graphic system, that can monitor the operation of boiler and function as a backup controller in case of failure in boiler controller, is applied to Ulsan power plant. As a result, it displays the operating data of the boiler process without error by 14 pages of color graphic image according to the operation menu, and additionally functions well as a fault-tolerant control system.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.16 no.12
• /
• pp.1313-1323
• /
• 1991

n this thesis CAM(content Addressable Memory) generator and graphic display tool for run-plot sequence in automatic generation of CAM are presented. We show that implementing the layout generation, graphic menu, mouse driver, and data structure by using the basic classes is clear and easy in modification than the conventional procedural language. For the implementation of generator which is independent of design rule or process, we use the parameterized cell so that basic cell can be changed according to user's inputs. and perform the layout by means of placement and routing using pitch mathching. Finally, the display of CIF which generated and constitution of graphic menu for total run-plot sequence are explained.