• 한국전산유체공학회:학술대회논문집
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• 2002.05a
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• pp.152-157
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• 2002

전산유체역학분야의 고속 연산을 위해서 병렬처리가 보편화되고 있으며 이러한 병렬해석은 주로 클러스터에서 저렴한 비용으로 수행되고 있다. 전산유체역학을 위한 클러스터 컴퓨터에서의 해석프로그램의 성능은 클러스터에 사용되는 프로세서의 성능뿐만 아니라 클러스터 내부의 통신 장비의 성능에 크게 좌우된다. 본 논문에서는 클러스터 컴퓨터의 구축에 널리 사용되고 있는 Myrinet2000, Gigabit Ethernet, Fast Ethernet 등의 네트웍 장치에 대해서 Netpipe, Linpack, NAS NPB, 그리고 MPINS2D Navier-Stokes 해석프로그램을 사용하여 성능을 비교하였다. 이를 통해서 향후 전산유체역학을 위한 클러스터 구축시 최대의 가격대 성능비를 얻을 수 있는 방법을 제시하고자 한다.

• Electronics and Telecommunications Trends
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• v.30 no.1
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• pp.42-50
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• 2015

PON(Passive Optical Network)은 설치 및 유지보수가 편리하여 광가입자망으로 널리 사용되고 있다. 대표적인 PON 기술로 IEEE에서 표준화된 EPON(Ethernet PON), 10G EPON과 ITU-T에서 표준화된 GPON(Gigabit capable PON), XG-PON 기술이 있다. EPON 및 GPON은 각각 1G급 및 2.5G급 전송속도를 제공하며 한국, 일본, 중국 등 아시아와 북미 등에서 가입자 서비스 및 비즈니스 서비스용으로 사용되고 있다. 2010년대부터 10G급 PON 기술 사용이 증가되고 있으며, 앞으로 가파르게 증가하고 있는 가입자 트래픽량에 대처하기 위해 40G급 또는 100G급 PON 기술이 사용될 것으로 예상된다. 본고에서는 현재 ITU-T에서 표준화가 진행 중인 NG-PON2(Next Generation PON2) 기술 중 주요기술인 TWDM-PON(Time and Wavelength Division Multiplexing-PON) 기술에 대한 국제 표준화 현황 및 국내외 기술개발 현황을 살펴보고자 한다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.17-20
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• 2000

Over the years of decades, the memory technology has progressed a long, marble way. As we have evidenced from the Intel’s 1Kb DRAM in 1970 to the Gigabit era of 2000’s, the road further ahead towards the Terabit era will be unfolded. The technology once perceived inconceivable is in realization today, and similarly roadblocks as we know of today may become trivial issues for tomorrow. For the inquiring mind, the question is how the “puzzle” of tomorrow’s memory technology is pieced-in today. The process will take place both in evolutionary and revolutionary ways. Among these, note-worthy are the changes in DRAM architecture and the cell process technology. In this paper, some technical approaches will be discussed to bring these aspects into a general overview and a perspective with possibilities for the new memory technology will be presented.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04a
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• pp.211-213
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• 2003

가상랜(VLAN:Virtual LAN) 기술은 멀티 캐스트 트래픽의 감소 효과가 크고, 효율적인 네트워크 보안 및 관리를 지원하므로, 대부분 최근의 상용 스위치는 가상랜 환경에서의 동작을 지원하고 있다. 가상랜 환경에서 동작하는 스위치에서 가상랜 정보를 주고받기 위하여 사용하는 프로토콜이 GARP/ GVRP(Generic Attribute Registration Protocol/GARP VALN Registration Protocol)이다. 이 프로토콜은 네트워크 환경에서 가상랜 정보가 바뀔 때마다 동적으로 각 스위치의 가상랜 정보를 설정해 줌으로써 네트워크 관리자의 수고를 덜어주며, 효율적으로 가상랜을 관리하는 방법을 지원하는 것이다. 따라서 가상랜 환경에서 동작하는 스위치는 대부분 GARP/GVRP를 내장하고 있으나, 범용 소스가 없이 생산업체 별로 자체 구현한 GARP/GVRP를 각각의 스위치에 탑재하고 있다. 본 논문은 이렇게 가상랜 환경을 지원하는 스위치에 필수적인 프로토콜인 GARP/GVRP를 리눅스 커널에 삽입 가능한 모듈 형태로 개발하였다. 또 개발한 모듈을 기가빗 이더넷 스위치(Gigabit Ethernet Switch)에 이식된 리눅스 커널에 삽입. 동작시키고 공인된 테스트 집합을 이용하여 프로토콜이 정확하게 동작함을 검증하였다.

• Journal of Information Processing Systems
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• v.13 no.1
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• pp.95-103
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• 2017

The PCI Express is a widely used system bus technology that connects the processor and the peripheral I/O devices. The PCI Express is nowadays regarded as a de facto standard in system area interconnection network. It has good characteristics in terms of high-speed, low power. In addition, PCI Express is becoming popular interconnection network technology as like Gigabit Ethernet, InfiniBand, and Myrinet which are extensively used in high-performance computing. In this paper, we designed and implemented a evaluation platform for interconnect network using PCI Express between two computing nodes. We make use of the non-transparent bridge (NTB) technology of PCI Express in order to isolate between the two subsystems. We constructed a testbed system and evaluated the performance on the testbed.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.4
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• pp.165-175
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• 2019

Networks use relatively slow heartbeat mechanisms, usually in routing protocols, to detect failures when there is no hardware signaling to help out. The time to detect failures available in the existing protocols is no better than a second, which is far too long for some applications and represents a great deal of lost data at 10 Gigabit rates. We compare the convergence time of routing protocol applying Bidirectional Forwarding Detection (BFD) protocol in wired mesh network topology. This paper suggests the combinations of protocols improving fail-over performance. Through the performance analysis, we contribute to reduce convergence time when system is fail-over.

• Proceedings of the Korea Information Processing Society Conference
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• 2004.05a
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• pp.1145-1148
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• 2004

Mainframe Linux를 이용한 가상서버환경은 점차 기존의 분산서버환경과 유사한 방향으로 진화하고 있다. 이와 같이 구현된 가상의 서버환경에서 보안성의 확보는 필수 사항으로 요구되고 있으며 이와 관련한 여러 방안 중 기존 분산서버환경과 유사한 Virtual Firewall의 필요성이 대두되고 있으며, 이에 본 논문은 분산서버환경의 Firewall 적용 및 Mainframe Linux의 가상서버환경 구현에 관한 연구활동을 바탕으로, Firewall로서의 기능적 요구사항과 Mainframe Linux 환경의 Resource 관리 관련요구사항을 기준으로 Debian 계열의 상용 Virtual Firewall의 적용과 성능에 대한 평가를 수행하였다. 추가로 기존 분산서버환경의 Appliance 형태의 Gigabit Firewall의 성능평가 결과를 비교하여 보았다. 기능 및 성능적인 면에서 기존 분산서버환경의 Firewall 제품들과 유사한 수준과, Resource 관리의 측면에서 타 서버들과 공존하는 가상서버환경에 큰 영향을 미치지 않는 결과를 보여주었다.

• Publications of The Korean Astronomical Society
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• v.23 no.2
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• pp.91-107
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• 2008

In this paper, we introduce the performance evaluation and development of Raw VLBI Data Buffer(RVDB) system for the synchronized playback processing of observed data in Korea-Japan Joint VLBI Correlator(KJJVC). The high-speed correlation processing system is under development so that the radio data obtained with 8192 channels and 8 Gbps speed from 16 stations will be able to be processed. When the recorded data of each station are played to correlator, the time synchronization of each station is very important because the correlator should process the data obtained with same time and condition. There are many types of recorder systems in the East Asia VLBI Network (EAVN). Therefore it is required to prepare the special time synchronized playback processing system to synchronize the time tag of observed data. The developed RVDB system consists of Data Input Output(DIO), 10GbE switch, and Disk Data Buffer(DDB). It can record the data with maximum 2 Gbps speed, and can play back the data to correlator with nominal 2 Gbps speed. To enable to play back the data of different playback system to the correlator, we developed the high-speed time synchronized playback processing system. We carried out the experiments of playing back and correlation for gigabit correlator and VCS trial product so as to confirm the performance of developed time synchronized playback processing system. In case of online and offline playing back experiment for gigabit correlator, we confirmed that the online and offline correlation results were the same. In case of playing back experiment for VCS trial product, we verified that the wide band and narrow band correlation results were also the same. Through the playing back experiments of RVDB system, the effectiveness of developed RVDB system was verified. In this paper, the system design, construction and experimental results are shown briefly.

• Journal of the Korea Convergence Society
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• v.8 no.8
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• pp.9-15
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• 2017

With the development of semiconductor integration technology, central processing units and storage devices have been miniaturized and performance has been rapidly developed, interconnection network technology is becoming a more important factor in terms of the performance of high performance computing system. In this paper, we analyze the trend of interconnection network technology used in high performance computing. Interconnect technology, which is the most widely used in the Supercomputer Top 500(2017. 06.), is an Infiniband. Recently, Ethernet is the second highest share after InfiniBand due to the emergence of 40/100Gbps Gigabit Ethernet technology. Gigabit Ethernet, where latency performance is lower than InfiniBand, is preferred in cost-effective medium-sized data centers. In addition, top-end HPC systems that demand high performance are devoting themselves from Ethernet and InfiniBand technologies and are attempting to maximize system performance by introducing their own interconnect networks. In the future, high-performance interconnects are expected to utilize silicon-based optical communication technology to exchange data with light.

• Journal of KIISE:Information Networking
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• v.30 no.2
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• pp.282-292
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• 2003

This paper proposes an efficient data structure for forwarding IPv4 and IPv6 packets at the gigabit speed in backbone routers. The LPM(Longest Prefix Matching) search becomes a bottleneck of routers' performance since the LPM complexity grows in proportion to the forwarding table size and the address length. To speed up the forwarding process, this paper introduces a data structure named BMT(Bit-Map Tie) to minimize the frequent main memory accesses. All the necessary search computations in BMT are done over a small index table stored at cache. To build the small index table from the tie representation of the forwarding table, BMT represents a link pointer to the child node and a node pointer to the corresponding entry in the forwarding table with one bit respectively. To improve the poor performance of the conventional tries when their height becomes higher due to the increase of the address length, BMT adopts a binary search algorithm for determining the appropriate level of tries to start. The simulation experiments show that BMT compacts the IPv4 backbone routers' forwarding table into a small one less than 512-kbyte and achieves the average speed of 250ns/packet on Pentium II processors, which is almost the same performance as the fastest conventional lookup algorithms.