• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.378-381
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• 2003

This paper presents a design and implementation of 10gigabit ethernet frame multiplexer/demultiplexer. In this paper, we discuss gigabit and 10 gigabit ethernet standard interfaces(GMII/XGMII) and we propose multiple gigabit ethernet frame multiplexing/demultiplexing scheme to handle 10gigabit ethernet frame instead of using 10gigabit network processor. And then 10gigabit ethernet frame MUX/DMUX is designed, verified and implemented using FPGA.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.1
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• pp.48-54
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• 2002

Gigabit Ethernet was advented as Internet's activation from owing to Internet user and the development of its various application and as inevitability the high-speed network as its demand for more and more the bandwidth by much application using the network. This Gigabit Ethernet makes an alternative plan to solve the request traffic by Internet user, because it holds several merits as providing great capacity with the network in the existing Ethernet environment and as displaying highly efficient ability This paper researches into a concept and characters about Gigabit Ethernet technology and raises the stability and efficiency of Gigabit Ethernet with regard of competing against FDDI technology and using Traffic analysis.

• Electronics and Telecommunications Trends
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• v.10 no.4 s.38
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• pp.37-55
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• 1995

고속 표준 프로토콜인 FC를 기반으로 한 Gigabit LAN 기술은 다양한 응용과 함께 Giga bps급의 높은 대역폭과 적은 전달지연을 갖는 고속 통신망으로서 매우 적합하다. 본 논문에서는 Gigabit 통신에 적합한 고속 표준 프로토콜인 FC의 표준화 내용과 프로토콜을 살펴보고, FC 기반의 LAN 기술을 위한 호스트 접속 기술 및 현재 연구/개발중인 Gigabit LAN을 구성하기 위한 요소시스템인 GIGAways 스위치 그리고 internetworking을 위한 FC-ATM Transport에 대하여 기술하였다.

• Journal of the Korean Professional Engineers Association
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• v.29 no.5
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• pp.99-103
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• 1996

In this paper we discuss Gigabit information communication service utilizing Gigabit information super-highway, multimedia data processing technology for the services, multimedia communication protocol for transmitting multimedia data and construction of Gigabit information communication network which can be accessed everywhere and present items which should be tactically prepared for high-level information society of the 21 st century.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.5
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• pp.27-36
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• 2004

In this paper, we propose the ethernet Inter-Processor Communication (IPC) network architecture and 10gigabit ethernet frame multiplex/demultiplexer architecture for the edge switch system based on Linux that has 10 Gigabit Ethernet (10Gigabit Ethernet) port with 72Gbps capacities. we discuss the ethernet IPC with ethernet switch and we propose design and implementation of ethernet Inter-Processor Communication (IPC) network architecture and multiple gigabit ethernet frame rnultiplexing/demultiplexing scheme to handle 10gigabit ethernet frame instead of using 10gigabit network processor. And then ethernet Inter-Processor Communication (IPC) network architecture and 10gigabit ethernet frame MUX/DMUX architecture is designed verified and implemented.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.125-129
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• 2002

In the multimedia age, the development of Internet/Intranet circumstances makes Required Traffic per user be gradually larger. And the more demand getting many pieces of information quickly increases, the more required the rapid network is as a necessary consequence. This is why we need the advanced Ethernet. Gigabit Ethernet has many advantages in many respects. For example, it increases the capacity of network and makes network highly efficient in the existing Ethernet circumstance. Thus, Gigabit Ethernet becomes a counterproposal that can resolve Required Traffic per internet user. Present study inquires the concepts and the characteristics connected with Gigabit Ethernet Technology and analyses the Link efficiency with a hypothetical modeling.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.911-914
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• 2001

본 논문에서는 10Gigabit Ethernet 물리계충 전송 기술로서 IEEE 802.3 Higher Speed Study Group (HSSG)에서 검토했던 방법으로 선로부호화 방법이 있는데 그 중에서 국내 연구진에 의해 제안된 최소 대역폭 선로부호 MB810을 사용하여 10Gigabit Ethernet에서의 clock recovery 가능성에 대해 알아 본다. MB810 code를 사용하면 기존의 통신 시스템에서 필요로하는 대역폭을 반만 사용하여 전송할 수 있기 때문에 대역 효율이 좋아지나 이전의 일반적인 square law 방법으로는 clock recovery가 어렵다. 본 논문에서는 4th power law 방법을 사용했을때의 이론적인 해석과 시뮬레이션 결과를 보인다.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.119-120
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• 2008

본 논문에서는 ECMA 표준에 기반한 multi-gigabit packet 수신기를 위한 프레임 검출 방안을 제안한다. ECMA 표준은 60 GHz 대역에서 multi-gigabit 전송률을 달성하기 위하여 버스트 (burst) 송수신 방식을 사용하며 프리앰볼 (preamble)과 데이터 (data)로 이루어진 프레임 (frame)을 통하여 데이터 송수신이 이루어진다. 본 논문에서는 ECMA 표준 중 DBPSK (Differential Binary Phase Shift Keying)와 DQPSK (Differential Quadrature Phase Shift Keying) 그리고 OOK (On-Off Keying) 변조 방식을 지원하는 multi-gigabit 송수신 시스템을 위한 프레임 검출기를 설계하였다. 설계된 프레임 검출기는 동일한 구조 및 동작 방식을 통하여 고려한 모든 변조 방식들을 지원할 수 있을 뿐만 아니라 하드웨어 구현 복잡도가 낮은 장점을 지닌다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.12 s.91
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• pp.1207-1215
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• 2004

A Gigabit Ethernet upstream transmission over a WDM-PON employing remotely wavelength-locked Fabry-Perot lasers has been demonstrated. We have successfully demonstrated a WDM transmission of four Gigabit Ethernet channels with 100 GHz channel spacing over 30 km conventional single mode fiber. The measured f-factor was larger than 17.1 dB. We have also investigated the beating noise characteristics of a wavelength-locked Fabry-Perot laser and showed the remotely wavelength-locked Fabry-Perot laser suppresses the intensity noise of the incoherent light injected, which cause a 6.3 dB SNR improvement compared with that of the conventional spectrum-sliced light source.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.3
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• pp.26-31
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• 2009

In this paper, we propose the receiver algorithms suitable for the ECMA standard proposed for multi-gigabit packet transmission in 60 GHz band. In the ECMA standard, various modulation schemes are used for system flexibility. Hence, it is crucial to develop receiver algorithms supporting various modulation schemes with an uniform hardware structure. In this paper, we propose the receiver algorithms supporting DBPSK, DQPSK and OOK modulation schemes simultaneously. The proposed algorithms are not only hardware efficient but also support various modulation schemes with an uniform hardware structure.