• 한국수자원학회논문집
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• 제51권5호
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• pp.405-415
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• 2018

연직수문의 방류량 계산에 필요한 수리학적 변수는 유량계수, 수문개방고, 상류수심이다. 자동수문의 수문개방고는 나머지 변수에도 영향을 미치기 때문에, 운영 중 수문개방고의 거동을 예측하는 것은 정밀한 수문설계를 위해 매우 중요하다. 본 연구에서는 부력식 연직수문 모형을 대상으로 부력이론으로 계산한 수문개방고와 실험에서 방류 중에 측정한 값과의 관계로 부터, 임의의 상류수심에서 수문개방고를 예측할 수 있는 무차원 관계식을 도출하였다. 측정값이 계산 값과 차이가 나는 것은 동수압 하중에 의한 영향임을 압력계수를 이용하여 검증하였다. 유량계수는 수문개방율과의 무차원 관계식을 도출하였다. 도출된 관계식들을 홍수추적에 적용한 결과, 수문설계 시에는 동수압 하중으로 인한 수문개방 억제 효과를 충분히 고려하여야 하는 것으로 판단되었다.

• 대한교통학회:학술대회논문집
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• 대한교통학회 2000년도 제37회 학술발표회논문집
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• pp.73-86
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• 2000

• 전기학회논문지
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• 제66권10호
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• pp.1494-1498
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• 2017

In this study, we investigate the influence of an overlap between the gate and source/drain regions of silicon nanowire (SiNW) CMOS (complementary metal-oxide-semiconductor) inverter on bendable plastic substrates and describe their electrical characteristics. The combination of n-channel silicon nanowire field-effect transistor (n-SiNWFET) and p-channel silicon nanowire field-effect transistor (p-SiNWFET) operates as an inverter logic gate. The gains with a drain voltage ($V_{dd}$) of 1 V are 3.07 and 1.21 for overlapped device and non-overlapped device, respectively. The superior electrical characteristics of each of the SiNW transistors including steep subthreshold slopes and the high $I_{on}/I_{off}$ ratios are major factors that enable the excellent operation of the logic gate.

• Journal of Electrical Engineering and information Science
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• 제3권2호
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• pp.261-266
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• 1998

This paper describes the fabrication and characterization of dual-polysilicon gated surface channel 0.1$\mu\textrm{m}$ CMOSFETs using BF2 and arsenic as channel dopants. We have used and LDD structure and 40${\AA}$ gate oxide as an insulator. To suppress short channel effects down to 0.1$\mu\textrm{m}$ channel length, shallow source/drain extensions implemented by low energy implantation and SSR(Super Steep Retrograde) channel structure were used. The threshold voltages of fabricated CMOSFETs are 0.6V. The maximum transconductance of nMOSFET is 315${\mu}$S/$\mu\textrm{m}$, and that of pMOSFET is 156 ${\mu}$S/$\mu\textrm{m}$. The drain saturation current of 418 ${\mu}$A/$\mu\textrm{m}$, 187${\mu}$A/$\mu\textrm{m}$ are obtained. Subthreshold swing is 85mV/dec and 88mV/dec, respectively. DIBL(Drain Induced Barrier Lowering) is below 100mV. In the device with 2000${\AA}$ thick gate polysilicon, depletion in polysilicon near the gate oxide results in an increase of equivalent gate oxide thickness and degradation of device characteristics. The gate delay time is measured to be 336psec at operation voltage of 2V.

• 전기전자학회논문지
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• 제27권3호
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• pp.308-312
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• 2023

게이트 전류 감지 구조는 LDO 레귤레이터가 오버슈트 또는 언더슈트 상황 발생 시 출력전압의 레귤레이션을 보다 효과적으로 제어하기 위해 제안되었다. 기존의 전형적인 LDO 레귤레이터는 부하전류가 변화할 때 레귤레이션 전압 변화가 발생한다. 하지만 게이트 전류 감지 구조를 이용하여 패스 트랜지스터에 있는 게이트 단자 전류를 공급/방전 함으로 인해 패스 트랜지스터의 동작 속도를 더욱 향상시킬 수 있다. 게이트 전류 감지 구조를 이용한 LDO 레귤레이터의 입력전압은 3.3 V ~ 4.5 V 이며 출력 전압은 3 V이고 부하 전류는 최대 250 mA의 값을 갖는다. 시뮬레이션 결과, 부하 전류가 250 mA 까지 변화할 때 약 9 mV의 전압 변화 값을 확인하였다.

• Transactions on Electrical and Electronic Materials
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• 제16권2호
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• pp.95-98
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• 2015

Organic polymer dielectric thin films of styrene and vinyl acetate were prepared by the plasma polymerization deposition technique and applied for the fabrication of an organic thin film transistor device. The structural properties of the plasma polymerized thin films were characterized by Fourier-transform infrared spectroscopy, X-ray diffraction, atomic force microscopy, and contact angle measurement. Investigation of the electrical properties of the plasma polymerized thin films was carried out by capacitance-voltage and current-voltage measurements. The organic thin film transistor device with gate dielectric of the plasma polymerized thin film revealed a low operation voltage of −10V and a low threshold voltage of −3V. It was confirmed that plasma polymerized thin films of styrene and vinyl acetate could be applied to functional organic thin film transistor devices as the gate dielectric.

• Journal of Power Electronics
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• 제15권5호
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• pp.1402-1408
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• 2015

A MOSFET's gate driver based on magnetic coupling is investigated. The gate driver can meet the demands in applications for wide range of duty cycles and high frequency. Fully galvanic isolation can be realized, and no auxiliary supply is needed. The driver is insensitive to the leakage inductor of the isolated transformer. No gate resistor is needed to damp the oscillation, and thus the peak output current of the gate driver can be improved. Design of the driving transformer can also be made more flexible, which helps to improve the isolation voltage between the power stage and the control electronics, and aids to enhance the electromagnetic compatibility. The driver's operation principle is analyzed, and the design method for its key parameters is presented. The performance analysis is validated via experiment. The disadvantages of the traditional magnetic coupling and optical coupling have been conquered through the investigated circuit.

• 한국환경과학회지
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• 제14권11호
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• pp.995-1004
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• 2005

As a research establish reservoir safety operation for small dam systems. This study presents hydrologic analysis conducted in the Duckdong and Bomun dam watershed based on various rainfall data and increase inflow. Especially the Duckdong dam without flood control feature are widely exposed to the risk of flooding, thus it is constructed emergency gate at present. In this study reservoir routing program was simulation for basin runoff estimating using HEC-HMS model, the model simulation the reservoir condition of emergency Sate with and without. At the reservoir analysis results is the Duckdong dam average storage decrease $20\%$ with emergency gate than without emergency gate. Also, the Bomun dam is not affected by the Duckdong flood control augmentation.

• 전기학회논문지
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• 제66권9호
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• pp.1351-1358
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• 2017

In this work, we investigated radiation hardness of GaN-based transistors which are strong candidates for next-generation power electronics. Field effect transistors with three types of gate structures including metal Schottky gate, recessed gate, and p-AlGaN layer gate were fabricated on AlGaN/GaN heterostructure on Si substrate. The devices were irradiated with energetic protons and alpha-particles. The irradiated transistors exhibited the reduction of on-current and the shift of threshold voltage which were attributed to displacement damage by incident energetic particles at high fluence. However, FET operation was still maintained and leakage characteristics were not degraded, suggesting that GaN-based FETs possess high potential for radiation-hardened electronics.

• 한국농공학회:학술대회논문집
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• 한국농공학회 2002년도 학술발표회 발표논문집
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• pp.133-136
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• 2002

A simulation by the TOPAS model, two dimensional finite difference model was performed on the flows through drainage lock gate for the Saemangeum tidal reclamation project. Analysis focus on the changes of intertidal zone areas according to the operation scheme of the gate. The intertidal zone areas were analyzed as $66{\sim}70\;km^2$ when the opening of the gate was 300 m. It occupied about $85{\sim}90%$ of intertidal zone areas compared to that the Mangyung sea basin was opened without sea-dike. It appeared to be the most effective in terms of securing enough intertidal zone areas when the gate was operated as inflowing sea-water after 2 day's drainage.