• Title/Summary/Keyword: gate metal

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A Semi-analytical Model for Depletion-mode N-type Nanowire Field-effect Transistor (NWFET) with Top-gate Structure

  • Yu, Yun-Seop
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.2
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    • pp.152-159
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    • 2010
  • We propose a semi-analytical current conduction model for depletion-mode n-type nanowire field-effect transistors (NWFETs) with top-gate structure. The NWFET model is based on an equivalent circuit consisting of two back-to-back Schottky diodes for the metal-semiconductor (MS) contacts and the intrinsic top-gate NWFET. The intrinsic top-gate NWFET model is derived from the current conduction mechanisms due to bulk charges through the center neutral region as well as of accumulation charges through the surface accumulation region, based on the electrostatic method, and thus it includes all current conduction mechanisms of the NWFET operating at various top-gate bias conditions. Our previously developed Schottky diode model is used for the MS contacts. The newly developed model is integrated into ADS, in which the intrinsic part of the NWFET is developed by utilizing the Symbolically Defined Device (SDD) for an equation-based nonlinear model. The results simulated from the newly developed NWFET model reproduce considerably well the reported experimental results.

C-V Characteristics of GaAs MESFETs (GaAs MESFET의 정전용량에 관한 특성 연구)

  • 박지홍;원창섭;안형근;한득영
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.11
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    • pp.895-900
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    • 2000
  • In this paper, C-V characteristics based on the structure of GaAs MESFET’s has been proposed with wide range of applied voltages and temperatures. Small signal capacitance; gate-source and gate-drain capacitances are represented by analytical expressions which are classified into two different regions; linear and saturation regions with bias voltages. The expression contains two variables; the built-in voltage( $V_{vi}$ )and the depletion width(W). Submicron gate length MESFETs has been selected to prove the validity of the theoretical perdiction and shows good agreement with the experimental data over the wide range of applied voltages.

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A Compact Quantum Model for Cylindrical Surrounding Gate MOSFETs using High-k Dielectrics

  • Vimala, P.;Balamurugan, N.B.
    • Journal of Electrical Engineering and Technology
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    • v.9 no.2
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    • pp.649-654
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    • 2014
  • In this paper, an analytical model for Surrounding Gate (SG) metal-oxide- semiconductor field effect transistors (MOSFETs) considering quantum effects is presented. To achieve this goal, we have used variational approach for solving the Poission and Schrodinger equations. This model is developed to provide an analytical expression for inversion charge distribution function for all regions of device operation. This expression is used to calculate the other important parameters like inversion charge density, threshold voltage, drain current and gate capacitance. The calculated expressions for the above parameters are simple and accurate. This paper also focuses on the gate tunneling issue associated with high dielectric constant. The validity of this model was checked for the devices with different dimensions and bias voltages. The calculated results are compared with the simulation results and they show good agreement.

Ultradense 2-to-4 decoder in quantum-dot cellular automata technology based on MV32 gate

  • Abbasizadeh, Akram;Mosleh, Mohammad
    • ETRI Journal
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    • v.42 no.6
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    • pp.912-921
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    • 2020
  • Quantum-dot cellular automata (QCA) is an alternative complementary metal-oxide-semiconductor (CMOS) technology that is used to implement high-speed logical circuits at the atomic or molecular scale. In this study, an optimal 2-to-4 decoder in QCA is presented. The proposed QCA decoder is designed using a new formulation based on the MV32 gate. Notably, the MV32 gate has three inputs and two outputs, which is equivalent two 3-input majority gates, and operates based on cellular interactions. A multilayer design is suggested for the proposed decoder. Subsequently, a new and efficient 3-to-8 QCA decoder architecture is presented using the proposed 2-to-4 QCA decoder. The simulation results of the QCADesigner 2.0.3 software show that the proposed decoders perform well. Comparisons show that the proposed 2-to-4 QCA decoder is superior to the previously proposed ones in terms of cell count, occupied area, and delay.

Fabrication of Pd/NiCr gate MISFET sensor for detecting hydrogen dissolved in Oil. (유중 용존수소 감지를 위한 Pd/NiCr 게이트 MISFET 센서의 제작)

  • Kim, Gop-Sick;Lee, Jae-Gon;Hahm, Sung-Ho;Choi, Sie-Young
    • Journal of Sensor Science and Technology
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    • v.6 no.3
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    • pp.221-227
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    • 1997
  • The Pd/NiCr gate MISFET-type sensors were fabricated for detecting hydrogen dissolved in high-capacivity transformer oil. To improve stability and high concentration sensitivity of the sensor, Pd/NiCr double catalysis metal gate was used. To reduce the serious gate voltage drift of the sensor induced by hydrogen, the gate insulators of 2 FETs were constructed with double layer of silicon dioxide and silicon nitride. The hydrogen sensitivity of the Pd/NiCr gate MISFET is about a half of Pd/Pt gate MISFET's sensitivity but the Pd/NiCr gate MISFET has good stability and high concentration detectivity up to 1000 ppm.

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Simulation of do Performance and Gate Breakdown Characteristics of MgO/GaN MOSFETs (MgO/GaN MOSFETs의 dc 특성 및 Gate Breakdown 특성 Simulation)

  • Cho, Hyeon;Kim, Jin-Gon;Gila, B.P.;Lee, K.P.;Abernathy, C.R.;Pearton, S.J.;Ren, F.
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.176-176
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    • 2003
  • The effects of oxide thickness and gate length of MgO/GaN metal oxide semiconductor field effect transistors (MOSFETs) on I-V, threshold voltage and breakdown voltage characteristics were examined using a drift-diffusion model. The saturation drain current scales in an inverse logarithmic fashion with MgO thickness and is < 10$^{-3}$ A.${\mu}{\textrm}{m}$$^{-1}$ for 0.5 ${\mu}{\textrm}{m}$ gate length devices with oxide thickness > 600 $\AA$ or for all 1 ${\mu}{\textrm}{m}$ gate length MOSFETs with oxide thickness in the range of >200 $\AA$. Gate breakdown voltage is > 100 V for gate length >0.5 ${\mu}{\textrm}{m}$ and MgO thickness > 600 $\AA$. The threshold voltage scales linearly with oxide thickness and is < 2 V for oxide thickness < 800 $\AA$ and gate lengths < 0.6 ${\mu}{\textrm}{m}$. The GaN MOSFET shows excellent potential for elevated temperature, high speed applications.

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Characteristics of Organic Thin Film Transistors with Organic and Organic-inorganic Hybrid Polymer Gate Dielectric (유기물과 유무기 혼합 폴리머 게이트 절연체를 사용한 유기 박막 트랜지스터의 특성)

  • Bae, In-Seob;Lim, Ha-Young;Cho, Su-Heon;Moon, Song-Hee;Choi, Won-Seok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.12
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    • pp.1009-1013
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    • 2009
  • In this study, we have been synthesized the dielectric layer using pure organic and organic-inorganic hybrid precursor on flexible substrate for improving of the organic thin film transistors (OTFTs) and, design and fabrication of organic thin-film transistors (OTFTs) using small-molecule organic semiconductors with pentacene as the active layer with record device performance. In this work OTFT test structures fabricated on polymerized substrates were utilized to provide a convenient substrate, gate contact, and gate insulator for the processing and characterization of organic materials and their transistors. By an adhesion development between gate metal and PI substrate, a PI film was treated using $O_2$ and $N_2$ gas. The best peel strength of PI film is 109.07 gf/mm. Also, we have studied the electric characteristics of pentacene field-effect transistors with the polymer gate-dielectrics such as cyclohexane and hybrid (cyclohexane+TEOS). The transistors with cyclohexane gate-dielectric has higher field-effect mobility, $\mu_{FET}=0.84\;cm^2/v_s$, and smaller threshold voltage, $V_T=-6.8\;V$, compared with the transistor with hybrid gate-dielectric.

Stability of Ta-Mo alloy on thin gate dielectric (박막 게이트 절연체 위에서 Ta-Mo 합금의 안정성)

  • Lee, Chung-Keun;Kang, Young-Sub;Seo, Hyun-Sang;Hong, Shin-Nam
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.04b
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    • pp.9-12
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    • 2004
  • This paper investigated the stability of Ta-Mo alloy on thin gate dielectric. Ta-Mo alloy was deposited by using co-sputtering process after thermal growing of 3.4nm and 4.2nm silicon dioxide. When the sputtering power of Ta and Mo were 100W and 70W, respectively, the suitable work function for NMOS gate electrode, 4.2eV, could obtain. To prove interface thermal stability of thin film gate dielectric and Ta-Mo alloy, rapid thermal annealing was performed at $600^{\circ}C$ and $700^{\circ}C$ for 10sec in Ar ambient. The results of interface reaction were surveyed by change of silicon dioxide thickness and work function after annealing process. Also, the reliability of alloy gate and gate dielectric could be confirmed by quantity of leakage current. Ta-Mo alloy was showed low sheet resistance and thermal stability, namely, little change of gate dielectric and work function, after $700^{\circ}C$ annealing process.

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A SPICE-Compatible Model for a Gate/Body-Tied PMOSFET Photodetector With an Overlapping Control Gate

  • Jo, Sung-Hyun;Bae, Myunghan;Choi, Byoung-Soo;Choi, Pyung;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.24 no.5
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    • pp.353-357
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    • 2015
  • A new SPICE-compatible model for a gate/body-tied PMOSFET photodetector (GBT PD) with an overlapping control gate is presented. The proposed SPICE-compatible model of a GBT PD with an overlapping control gate makes it possible to control the photocurrent. Research into GBT PD modeling was proposed previously. However, the analysis and simulation of GBT PDs is not lacking. This SPICE model concurs with the measurement results, and it is simpler than previous models. The general GBT PD model is a hybrid device composed of a MOSFET, a lateral bipolar junction transistor (BJT), and a vertical BJT. Conventional SPICE models are based on complete depletion approximation, which is more applicable to reverse-biased p-n junctions; therefore, they are not appropriate for simulating circuits that are implemented with a GBT PD with an overlapping control gate. The GBT PD with an overlapping control gate can control the sensitivity of the photodetector. The proposed sensor is fabricated using a $0.35{\mu}m$ two-poly, four-metal standard complementary MOS (CMOS) process, and its characteristics are evaluated.

Metal Plasma-Etching Damages of NMOSFETs with Pure and $N{_2}O$ Gate Oxides (게이트 산화막에 따른 nMOSFET의 금속 플라즈마 피해)

  • Jae-Seong Yoon;Chang-Wu Hur
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.2
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    • pp.471-475
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    • 1999
  • The metal plasma-etch damage immunity of nMOSFET with $N{_2}O$ gate oxide is found to be improved comparing to that with regular pure oxide of similar thickness. With increasing the antenna ratio (AR), the characteristics of nMOSFETs with $N{_2}O$ oxide shows tighter initial distribution and smaller degradation under constant field stress, which is explained by the effect of the nitrogen at the substrate $Si/SiO_2$ interface. Also, if $N{_2}O$ gate oxide is used, the maximum allowable size of metal AAR and PAR may be increased to the much larger values. These improvements of nMOSFETs with $N{_2}O$ gate oxide are attributed to the effect of the interface hardness improved by the nitrogen included at the substrate-Si/$N{_2}O$-oxide interface.

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