• Title/Summary/Keyword: gate electrode material

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Analysis of the Output Characteristics of IGZO TFT with Double Gate Structure (더블 게이트 구조 적용에 따른 IGZO TFT 특성 분석)

  • Kim, Ji Won;Park, Kee Chan;Kim, Yong Sang;Jeon, Jae Hong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.4
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    • pp.281-285
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    • 2020
  • Oxide semiconductor devices have become increasingly important because of their high mobility and good uniformity. The channel length of oxide semiconductor thin film transistors (TFTs) also shrinks as the display resolution increases. It is well known that reducing the channel length of a TFT is detrimental to the current saturation because of drain-induced barrier lowering, as well as the movement of the pinch-off point. In an organic light-emitting diode (OLED), the lack of current saturation in the driving TFT creates a major problem in the control of OLED current. To obtain improved current saturation in short channels, we fabricated indium gallium zinc oxide (IGZO) TFTs with single gate and double gate structures, and evaluated the electrical characteristics of both devices. For the double gate structure, we connected the bottom gate electrode to the source electrode, so that the electric potential of the bottom gate was fixed to that of the source. We denote the double gate structure with the bottom gate fixed at the source potential as the BGFP (bottom gate with fixed potential) structure. For the BGFP TFT, the current saturation, as determined by the output characteristics, is better than that of the conventional single gate TFT. This is because the change in the source side potential barrier by the drain field has been suppressed.

Study on die electric characteristics of TIPS-pentacene transistors with variation of electrode thickness (소스/드레인 전극의 두께변화에 따른 TIPS-pentacene 트랜지스터의 전기적 특성 연구)

  • Yang, Jin-Woo;Hyung, Gun-Woo;Kim, Young-Kwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.323-324
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    • 2009
  • We investigated the electrical properties of tris-isopropylsilylethynyl (TIPS)-pentacene organic thin-film transistors (OTFTs) employing Ni/Ag source/drain electrodes. The gap height between the gate insulator and S/D electrode was controlled by changing the thickness of Ag under-layer(20, 30, 40 and 50nm). After evaporating the Ni under-layer, TIPS pentacene channel material was dropping the gap between the gate insulator and SID electrodes. The electrical proprieties of OTFT such as filed-effect mobility, on/off ratio, threshold voltage and subthreshold slope were significantly influenced by the gap height.

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Electrical Characteristics of Organic TFTs Using ODPA-ODA and 6FDA-ODA Polyimide Gate Insulators

  • Lee, Min-Woo;Pyo, Sang-Woo;Jung, Lae-Young;Shim, Jae-Hoon;Sohn, Byoung-Chung;Kim, Young-Kwan
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.770-772
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    • 2002
  • A new dry-processing method of organic gate dielectric film in field-effect transistors (FETs) was proposed. The method use vapor deposition polymerization (VDP) that is continuous and low temperature process. It has the advantages of shadow mask patterning and dry processing in flexible low-cost large area applications. Here, 80 nm-thick Al as a gate electrode was evaporated through shadow mask. Gate insulators used two different polyimides. The one material was 4,4'-oxydiphtahlic anhydride (ODPA) and 4,4'-oxydianiline (ODA). Another was 2,2-bis(3,4-dicarboxyphenyl) Hexafluoropropane Dianhydride (6FDA) and 4,4' -oxydianiline (ODA). These were co-deposited by high-vaccum thermal-evapora and cured at 150 $^{\circ}C$ for 1 hour, respectively. Pentacene as a semiconductor and 100 nm-thick Au as a source and drain electrode were evaporated through shadow mask.

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MOS characteristics of Ta-Mo gate electrode with $ZrO_2$ ($ZrO_2$ 절연막을 이용한 Ta-Mo 합금 MOS 게이트 전극의 특성)

  • An, Jae-Hong;Kim, Bo-Ra;Lee, Joung-Min;Hong, Shin-Nam
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.157-159
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    • 2005
  • MOS capacitors were fabricated to study electrical and chemical properties of Ta-Mo metal alloy with $ZrO_2$. The work function of Ta-Mo alloy were varied from 4.1eV to 5.1eV by controlling the composition. When the atomic composition of Mo is 10%, good thermal stability up to $800^{\circ}C$ was observed and work function of MOS capacitor was 4.1eV, compatible for NMOS application. But pure Ta exhibited very poor thermal stability. After $600^{\circ}C$ annealing, equivalent oxide thickness of tantalum gate MOS capacitor was continuously decreased. Barrier heights of Ta-Mo alloy and pure metal that supported the work function values were calculated from Fowler-Nordheim analysis. As a result of these electrical?experiments, Ta-Mo metal alloy with $ZrO_2$ is excellent gate electrode for NMOS.

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Structural and electrical characterizations of $HfO_{2}/HfSi_{x}O_{y}$ as alternative gate dielectrics in MOS devices (MOS 소자의 대체 게이트 산화막으로써 $HfO_{2}/HfSi_{x}O_{y}$ 의 구조 및 전기적 특성 분석)

  • 강혁수;노용한
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.45-49
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    • 2001
  • We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

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Simulations of Effects of Common Electrode Voltage Distributions on Pixel Characteristics in TFT -LCD (TFT-LCD 공통 전극 전압 분포에 따른 화소 특성 시뮬레이션)

  • Kim, Tae-Hyung;Park, Jae-Woo;Kim, Jin-Hong;Choi, Jong-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04a
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    • pp.165-168
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    • 2000
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color fiat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. In addition, PDAST can estimate voltage distributions in common electrode which can affect pixel voltage and feed-through voltage. Since PDAST can simulate the gate, data and the pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of common electrode voltage can be effectively analyzed. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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A Study of The Electrical Characteristics of Small Fabricated LTEIGBTs for The Smart Power ICs (스마트 파워 IC에의 활용을 위한 소형 LTEIGBT의 제작과 전기적인 특성에 관한 연구)

  • 오대석;김대원;김대종;염민수;강이구;성만영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.338-341
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    • 2002
  • A new small size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed and fabricated to improve the characteristics of device. The entire electrode of LTEIGBT is placed to trench type electrode. The LTEIGBT is designed so that the width of device is 19$\mu\textrm{m}$. The latch-up current density of the proposed LTEIGBT is improved by 10 and 2 times with those of the conventional LIGET and LTIGBT The forward blocking voltage of the LTEIGBT is 130V. At the same size, those of conventional LIGBT and LTIGBT are 60V and 100V, respectively. Because that the electrodes of the proposed device is formed of trench type, the electric field in the device are crowded to trench oxide. We fabricated He proposed LTEIGBT after the device and process simulation was finished. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT and the conventional LIGBT are 80mA and 70mA, respectively, at the same breakdown voltage of 150V,

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A Novel Lateral Trench Electrode IGBT for Suprior Electrical Characteristics (인텔리전트 파워 IC의 구현을 위한 횡형 트렌치 전극형 IGBT의 제작 및 그 전기적 특성에 관한 연구)

  • 강이구;오대석;김대원;김대종;성만영
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.9
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    • pp.758-763
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    • 2002
  • A new small size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed and fabricated to improve the characteristics of device. The entire electrode of LTEIGBT is placed to trench type electrode. The LTEIGBT is designed so that the width of device is 19w. The latch-up current density of the proposed LTEIGBT is improved by 10 and 2 times with those of the conventional LIGBT and LTIGBT. The forward blocking voltage of the LTEIGBT is 130V. At the same size, those of conventional LIGBT and TIGBT are 60V and 100V, respectively. Because the electrodes of the proposed device is formed of trench type, the electric field in the device are crowded to trench oxide. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT and the conventional LIGBT are 80mA and 70mA, respectively, at the same breakdown voltage of 150V.

Fabricated thin-film transistors with P3HT channel and $NiO_x$ electrodes (P3HT와 IZO 전극을 이용한 thin film transistors 제작)

  • Kang, Hee-Jin;Han, Jin-Woo;Kim, Jong-Yeon;Moon, Hyun-Chan;Park, Gwang-Bum;Kim, Tae-Ha;Seo, Dae-Shik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.467-468
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    • 2006
  • We report on the fabrication of P3HT-based thin-film transistors (TFT) that consist of indium-zinc-oxide (IZO), PVP (poly-vinyl phenol), and Ni for the source-drain (S/D) electrode, gate dielectric, and gate electrode, respectively. The IZO S/D electrodes of which the work function is well matched to that of P3HT were deposited on a P3HT channel by thermal evaporation of IZO and showed a moderately low but still effective transmittance of ~25% in the visible range along with a good sheet resistance of ${\sim}60{\Omega}/{\square}$. The maximum saturation current of our P3HT-based TFT was about $15{\mu}A$ at a gate bias of -40V showing a high field effect mobility of $0.05cm^2/Vs$ in the dark, and the on/off current ratio of our TFT was about $5{\times}10^5$. It is concluded that jointly adopting IZO for the S/D electrode and PVP for gate dielectric realizes a high-quality P3HT-based TFT.

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Design and Fabrication of 1700 V Emitter Switched Thyristor (1700 V급 EST소자의 설계 및 제작에 관한 연구)

  • Kang, Ey-Goo;Ahn, Byoung-Sub;Nam, Tae-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.3
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    • pp.183-189
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    • 2010
  • In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.