• ETRI Journal
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• 제25권5호
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• pp.328-336
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• 2003

Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

• 한국산업융합학회 논문집
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• 제3권1호
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• pp.9-15
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• 2000

This paper presents a implementation of digital motion control system for induction motor vector drives using the 16bit DSP TMS320F240. The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent controllers for motors which can be yield enhanced operation, fewer system components, lower system cost, increased efficiency and high performance. The system presented are speed and current sensing, sine look-up table and generated SVPWM by fully integrated control software. The developed system in a implementation are shown a good speed response and motion control characteristic results, and high performance features in general purposed 2.2[kW] machine. The system can be adapted variform motor drive system.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.377-381
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• 1999

This paper presents a implementation of digital motion control system for induction motor vector drives using the 16bit DSP TMS320F240. The DSP controller enable enhanced real time algorithm and cost-effective design of intelligent controllers for induction motors which can be yield enhanced operation, fewer system components, lower system cost, increased efficiency and high performance. The system presented are speed and current sensing, sine look-up table and generated SVPWM by fully integrated control software. The developed system in a implementation are shown a good speed response characteristic results and high performance features. The system can be adapted variform motor drive system.

• 소음진동
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• 제6권2호
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• pp.205-214
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• 1996

Active noise control(ANC) requires the full capability of a modern digital signal processing module. This paper describes the digital signal processing unit which is designed for ANC of noise fields in passenger car. System hardware is designed to allow software controlled versatility as well as fully qutomatic operation. The developed system is provided with the ability to be self-operated except the case of upload/download of data and program between the personal computer and the system memory. Experimental results are presented to demonstrate ANC performance of noise fields in lightly damped enclosure and passenger car.

• 전력전자학회논문지
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• 제21권1호
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• pp.49-57
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• 2016

A modular multilevel converter is widely adapted for a high-voltage direct current power transmission system. This study proposes a design methodology for a novel digital control that mitigates the negative effects caused by time delay, including communication transport delay for a modular multilevel converter. The modeling and negative effect of time delay are analyzed theoretically in a frequency domain, and its compensation methodology based on an inverse model is described fully with practical considerations. The proposed methodology is verified through several simulation results using a modular 21-level converter system.

• 대한임베디드공학회논문지
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• 제14권1호
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• pp.33-41
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• 2019

We propose an embedded solution to design a high-speed and high-accuracy 16bit analog-digital signal processing interface for the control systems using various external analog signals. Choosing TMS320F28377D micro controller unit (MCU) featuring high-performance processing in the 32-bit floating point operation, low power consumption, and various I/O device supports, we design and build the proposed system that supports both 16-bit analog-digital converter (ADC) interface and high precision digital-analog converter (DAC) interface. The ADC receives voltage-level differential signals from fully differential amplifiers, and the DAC communicates with MCU through 50 MHz bandwidth high-fast serial peripheral interface (SPI). We port the boot loader and device drivers to the implemented board, and construct the firmware development environment for the application programming. The performance of the entire implemented system is demonstrated by analog-digital signal processing tests, and is verified by comparing the test results with those of existing similar systems.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.535-538
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• 2005

Today, most fixed-wing aircrafts are equipped with the antiskid brake system. It can modulate braking moments in the wheels optimally, when an aircraft is landing. So it can reduce landing distance and increase safeties. The antiskid brake system for an aircraft are mainly composed of braking moment modulators (hydraulic control valves) and brake control unit. In this paper, a Mark IV type - fully digital - brake controller is studied. For the development of its control algorithms, a 5-DOF (Degree of Freedom) aircraft landing model is composed in the form of matlab/simulink model at first. Then, braking moment control algorithms using wheel decelerations and slips are made. The developed algorithms are tested in software simulations using state-flow toolboxes in matlab/simulink model. Also, a real-time simulation systems are made, which use hydraulic brake systems of a real aircraft, pressure control valves and its controller as hardware components of HIL(Hardware In-the-Loop) simulation. Algorithms tested in software simulations are coded into the controller and the real-time landing simulations are made in very severe road conditions. The real-time simulation results are presented.

• 한국위성정보통신학회논문지
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• 제7권3호
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• pp.135-139
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• 2012

디지털 제어기를 사용하면 태양전력 조절기의 전력변환 시 아날로그 회로로 구현이 불가능한 전력변환 제어 기법을 적용할 수 있으며 태양전력 조절기의 복잡한 운용 알고리즘을 구현할 수 있다. 디지털 제어기를 사용하여 태양전력 조절기의 입력 등가 임피던스를 저항 특성을 가지도록 정저항 제어하면 단일 정저항 제어기만으로 태양전력 조절기의 전류를 제어를 할 수 있다. 한편, 태양전지는 전압원 영역에서 저항이 큰 폭으로 변하며, 전류원 영역에서 작은 폭으로 변한다. 따라서 태양전력 조절기를 정저항 제어기로 제어하는 경우, 이러한 태양전지의 특성에 적합한 가변 진폭 최대 전력점 추적 기법을 적용하는 것이 유리하다. 그러나 가변 진폭 최대 전력점 추적은 태양전지의 대신호 저항과 소신호 저항을 이용하므로 태양전지가 출력하는 전력량을 계산하여 제한할 수 없다. 본 논문에서는 디지털 제어기를 사용하여 태양전지가 생성하는 최대 전력을 제한하는 운용 알고리즘을 제안하고 모의실험을 통해 디지털 제어기로 제어되는 태양전력 조절기를 검증한다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
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• pp.1489-1491
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• 2005

This paper proposes a design method using PQR instantaneous power theory on the active power filter, unbalanced nonlinear load condition and unbalanced source voltage condition in three-phase four-wire systems. For reduction of current harmonics and neutral current, the control structure including repetitive controller is proposed and controller gain is designed. For fully-digital implementation, ramp comparison PWM method was adopted. Simulation results verify good performance of the proposed current control strategy on the shunt APFs.

• 전기학회논문지
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• 제59권5호
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• pp.1005-1009
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• 2010

This paper presents a digitally-controlled filter calibration technique for biquad RC filter using self oscillation. The biquad RC filter is converted to a fully-differential ring oscillator by changing its resistor connections, where the oscillation frequency reflects the cut-off frequency. The proposed calibration circuit measures the oscillation frequency by counting with a fixed higher-frequency clock and then tunes it to a desired frequency with a digital frequency-locked loop including a PI controller. Because the proposed circuit directly measures the cut-off frequency of the filter itself and calibrates it with the small area digital circuits, the area and the power consumption are much small compared with conventional works. When it is implemented in a 65nm CMOS process, the calibration circuit except the filter consumes the area of 80um X 50um and power consumption is 443uA at 1.2 V supply voltage.