The Transactions of the Korean Institute of Power Electronics (전력전자학회논문지)

The Korean Institute of Power Electronics (전력전자학회)
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A Design Methodology of Digital Controller Considering Time Delay Effect for a Modular Multilevel Converter VSC HVDC System

모듈형 멀티레벨 전압형 HVDC 시스템을 위한 시간 지연을 고려한 디지털 제어기의 설계

  • Song, Ji-Wan (Dept. of Electrical Eng., EECS Lab., Hanyang University) ;
  • Ku, Nam-Joon (Dept. of Electrical Eng., EECS Lab., Hanyang University) ;
  • Kim, Rae-Young (Dept. of Electrical and Biomedical Eng., Hanyang University)
  • Received : 2014.03.04
  • Accepted : 2015.12.28
  • Published : 2016.02.20
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Abstract

A modular multilevel converter is widely adapted for a high-voltage direct current power transmission system. This study proposes a design methodology for a novel digital control that mitigates the negative effects caused by time delay, including communication transport delay for a modular multilevel converter. The modeling and negative effect of time delay are analyzed theoretically in a frequency domain, and its compensation methodology based on an inverse model is described fully with practical considerations. The proposed methodology is verified through several simulation results using a modular 21-level converter system.

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References

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