• Title/Summary/Keyword: full-custom

Search Result 86, Processing Time 0.024 seconds

Gene Expression Analysis of Acetaminophen-induced Liver Toxicity in Rat (아세트아미노펜에 의해 간손상이 유발된 랫드의 유전자 발현 분석)

  • Chung, Hee-Kyoung
    • Toxicological Research
    • /
    • v.22 no.4
    • /
    • pp.323-328
    • /
    • 2006
  • Global gene expression profile was analyzed by microarray analysis of rat liver RNA after acute acetaminophen (APAP) administration. A single dose of 1g/kg body weight of APAP was given orally, and the liver samples were obtained after 24, 48 h, and 2 weeks. Histopathologic and biochemical studies enabled the classification of the APAP effect into injury (24 and 48 h) and regeneration (2 weeks) stages. The expression levels of 4900 clones on a custom rat gene microarray were analyzed and 484 clones were differentially expressed with more than a 1.625-fold difference(which equals 0.7 in log2 scale) at one or more time points. Two hundred ninety seven clones were classified as injury-specific clones, while 149 clones as regeneration-specific ones. Characteristic gene expression profiles could be associated with APAP-induced gene expression changes in lipid metabolism, stress response, and protein metabolism. We established a global gene expression profile utilizing microarray analysis in rat liver upon acute APAP administration with a full chronological profile that not only covers injury stage but also later point of regeneration stage.

ASIC design of high speed CAM for connectionless server of ATM network (ATM망의 비연결형 서버를 위한 고속 CAM ASIC 설계)

  • 백덕수;김형균;이완범
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.22 no.7
    • /
    • pp.1403-1410
    • /
    • 1997
  • Because streaming mode connection server suitable to wide area ATM networks performs transmission, reception and lookup with time restriction for the transmission time of a cell, it has demerits of large cell loss incase that burst traffic occurs. Therefore, in this paper to decrease cell loss we propose a high speed CAM (Content Addressable Memory) which is capable of processing data of streaming mode connections server at a high speed. the proposed CAM is applied to forwarding table VPC map which performs function to output connection numbers about input VPI(Virtual Path Identifier)/VCI(Virtual Channel Identifier). The designed high speed CAM consist of DBL(Dual Bit Line) CAM structure performed independently write operation and match operation and two-port SRAM structure. Also, its simulation verification and full-custom layout is performed by Hspice and Composs tools in 0.8 .$\mu$m design rule.

  • PDF

The Theoretical Power-factor Correction of a 3-phase Induction Motor using Customer STATCOM (수용가용 STATCOM을 이용한 3상 유도전동기의 이론적인 역률 보상)

  • Lim, Su-Saeng;Lee, Eun-Woong;Choi, Jae-Young;Kim, Hong-Kwon
    • The Transactions of the Korean Institute of Electrical Engineers B
    • /
    • v.49 no.7
    • /
    • pp.475-482
    • /
    • 2000
  • This paper presents a novel power-factor correction method using customer STATCOM which generally improves the power quality of electric customers. Customer STATCOM detects the reactive currents of a induction motor(IM) and so injects compensation currents which is in 180$^{\circ}$ phase with load currents that the reactive power of IM is compensated. In particular, the paper proposes the general compensation current references in the synchronous coordinate system and makes converter output voltages using space-vector PWM. The compensation effect of customer STATCOM is confirmed through the simulation according to the operation condition of an induction motor (at no load and full load).

  • PDF

A simple technique for impression taking of teeth and functionally generated paths

  • Yamamoto, Takatsugu;Sato, Yohei;Watanabe, Hidehiko;Punj, Amit;Abe, Minoru;Momoi, Yasuko;Ohkubo, Chikahiro
    • Restorative Dentistry and Endodontics
    • /
    • v.43 no.1
    • /
    • pp.9.1-9.6
    • /
    • 2018
  • The objective of this case report is to introduce a simple technique for simultaneously taking a closed-mouth impression and functionally generated path (FGP) for a full coverage crown restoration. A monolithic zirconia crown was the restoration of choice. An alginate impression of the abutment tooth was taken to fabricate a custom-made closed-mouth impression tray covering the abutment tooth and the adjacent teeth. The tray had an FGP table and an abutment tray in cameo and intaglio surfaces, respectively. The impression was taken with silicone impression material after adjusting the abutment tray and inscribing the FGP using self-curing acrylic resins. Plaster casts were made from the impression, and a zirconia crown was fabricated. The crown was cemented to the abutment tooth with minimal adjustments. This simple technique resulted in a well-fitting crown that accounted for mandibular movements. Using the custom closed-mouth impression tray incorporating an FGP table simultaneously aids in fabricating an accurately fitting restoration that incorporates harmonious mandibular movements using a single impression capture.

Low Power High Frequency Design for Data Transfer for RISC and CISC Architecture (RISC와 CISC 구조를 위한 저전력 고속 데이어 전송)

  • Agarwal Ankur;Pandya A. S.;Lho Young-Uhg
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.10 no.2
    • /
    • pp.321-327
    • /
    • 2006
  • This paper presents low power and high frequency design of instructions using ad-hoc techniques at transistor level for full custom and semi-custom ASIC(Application Specific Integrated Circuit) designs. The proposed design has been verified at high level using Verilog-HDL and simulated using ModelSim for the logical correctness. It is then observed at the layout level using LASI using $0.25{\mu}m$ technology and analyzed for timing characteristic under Win-spice simulation environment. The result shows the significant reduction up to $35\%$ in the power consumption by any general purpose processor like RISC or CISC. A significant reduction in the propagation delay is also observed. increasing the frequency for the fetch and execute cycle for the CPU, thus increasing the overall frequency of operation.

Full digital control of permanent magnet AC servo motors

  • Lee, Jin-Won;Kim, Dong-Il;Jin, Sang-Hyun;Oh, In-Hwan;Kim, Sungkwun
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 1993.10b
    • /
    • pp.218-223
    • /
    • 1993
  • In this paper, we present a full digital control scheme which controls currents and speed of the permanent magnet AC servo motor with large range of bandwidth and high performance. The current equations of the permanent magnet AC servo motor are linearized by feedback linearization technique. Both acceleration feedforward terms and IP controllers, whose gains are functions of motor speed, are used in order to control motor currents. In addition the phase delays in current control loops are compensated by placing phase lead-lag compensators after current commands, which make it possible to avoid high gains in the current controllers. Unity power factor can be achieved by the proposed current controller. Pulsewidth modulation is performed by way of the well-known comparison with a triangular carrier signals. The velocity controller is designed on the basis of the linearized model of the permanent magnet AC servo motor by the proposed current controller. The performance of the entire control system is analyzed in the presence of uncertainty in the motor parameters. The proposed control scheme is implemented using the digital signal processor-based controller composed of an Analog Device ADSP 2111 and a NEC78310. The pulsewidth modulation (PWM) signals are generated through a custom IC, SAMSUNG-PWM1, which has the outputs of current controllers as input. The experimental results show that the permanent magnet AC servo motor can be always driven with high dynamic performance by the proposed full digital control scheme of motor speed and motor current.

  • PDF

Comparative study of two CAD software programs on consistency between custom abutment design and the output (두 가지 CAD software의 맞춤형 지대주 디자인과 출력물 일치도 비교)

  • Lim, Hyun-Mi;Lee, Kyu-Bok;Lee, Wan-Sun;Son, KeunBaDa
    • Journal of Dental Rehabilitation and Applied Science
    • /
    • v.34 no.3
    • /
    • pp.157-166
    • /
    • 2018
  • Purpose: This study was aimed to compare the consistency between the custom abutment design and the output in two CAD software programs. Materials and Methods: Customized abutments were designed by using 3Shape Dental System CAD software and Delta9 CAD software on a plaster model with implants (CRM STL file). After milling of the designed abutments, the abutments were scanned with a contact method scanner (Test STL file). We overlaid the Test STL file with each CRM STL file by using inspection software, and then compared the milling reproducibility by measuring the output error of the specimens from each CAD software program. Results: The Delta9 showed better milling reproducibility than 3Shape when comparing the milling errors obtained with a full scan of all specimens (P < .05) and also when comparing the axial wall region specifically according to the axial angle. With 0.9 mm marginal radius, the Delta9 showed better consistency between the design and the output than 3Shape (P < .05). While, anti-rotation form had no significant difference in error between the two systems. When cumulative errors were compared, the Delta9 showed better milling reproducibility in almost cases (P < .05). Conclusion: Delta9 showed a significantly smaller error for most of the abutment design options. This means that it is possible to facilitate generation of printouts with reliable reproducibility and high precision with respect to the planned design.

A Study on the Chinese Architectural View Point of Realist Hong Daeyong and Joseon Embassy in Beijing (실학파(實學派) 학인(學人) 홍대용(洪大容)의 중국(中國) 건축관(建築觀)과 북경(北京) 조선관(朝鮮館)에 관한 연구)

  • Han, Dong-Soo
    • Journal of architectural history
    • /
    • v.15 no.1 s.45
    • /
    • pp.29-40
    • /
    • 2006
  • This paper is focused on Damheonseo(湛軒書), an anthology written by Hong Daeyong, and I deal with Chinese Architectural views which he had experienced in his itinerary to Beijing, and the vivid pictures of Joseonkwan (called the Koryo or Joseon Embassy) located in Beijing at that time. He was a scholar of great erudition over astronomy, mathematics, military science, politics, and so on. He was interested in practical sciences at early time, and criticized secular scholars full of vanity who had presented purposeless articles. In his age of 35, Qianlong(乾隆) 30 (1764, Youngjo 41), he, a military escort, accompanied by Hong Uk, Joseon envoy and his uncle. Before his itinerary, he self-studied Chinese. Also, during a long journey he got new experiences and information around each area, deviating his group whenever he had some times. He could get more variant experiences than others because of his character full of curiosity, and his observations from the vivid lives of the time helped us get various views between Chinese and Korean architecture. Likewise, although he denounced Qing(淸) scathingly as a barbarian, he mentioned several points about the characteristics of Chinese architecture at that time. First of all, totally Chinese architecture had strong rational and practical points. Secondly, based on bountiful products, buildings along streets shown in Chinese city had sophisticated compositions, and luxurious and magnificent appearances. Thirdly, using the brick from walls to houses was so universal. Fourthly, the layouts of building with three- or four-closed courtyard had very orderly shapes, and the structure of street was also so arranged. Finally, because of stand-up lives, the scales and appearances of interior space were even more extended, and storages were less developed than those of Joseon. As another points, I found that Joseonkwan was moved next to Shushangguan(庶常館)from Huidongnanguan(會同南館) around Hanlimyuan(翰林院), and had been remodeled into a house with Korean custom in using the inner spaces, although it was followed by a closed courtyard style. Likewise, I recognized that Ondols were sure to be established in all temporary houses during the journey to Qing, and felt their strong traditional residential custom in such mentions. Now that the past pictures have disappeared and ways of life and our values have been largely changed, this study has very important meaning in comparing the ancient Chinese and Korean architecture.

  • PDF

A 200-MHz@2.5V 0.25-$\mu\textrm{m}$ CMOS Pipelined Adaptive Decision-Feedback Equalizer (200-MHz@2.5-V 0.25-$\mu\textrm{m}$ CMOS 파이프라인 적응 결정귀환 등화기)

  • 안병규;이종남;신경욱
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2000.05a
    • /
    • pp.465-469
    • /
    • 2000
  • This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer (PADFE) using a 0.25-${\mu}{\textrm}{m}$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stage are inserted into the critical path of the ADFE by using delayed least-mean-square (DLMS) algorithm Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The singl-chip PADFE contains about 205,000 transistors on an area of about 1.96$\times$1.35-$\textrm{mm}^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW.

  • PDF

A Design of Pipelined Adaptive Decision-Feedback Equalized using Delayed LMS and Redundant Binary Complex Filter Structure (Delayed LMS와 Redundant Binary 복소수 필터구조를 이용한 파이프라인 적응 결정귀환 등화기 설계)

  • An, Byung-Gyu;Lee, Jong-Nam;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.37 no.12
    • /
    • pp.60-69
    • /
    • 2000
  • This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer(PADFE) using a 0.25-${\mu}m$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stages are inserted into the critical path of the ADFE by using delayed least-mean-square(DLMS) algorithm. Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width, and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The single-chip PADFE contains about 205,000 transistors on an area of about $1.96\times1.35-mm^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW. Test results show that the fabricated chip works functionally well.

  • PDF