• Title/Summary/Keyword: forward error correction codes

Search Result 47, Processing Time 0.03 seconds

A Performance Analysis of FEC Coding Method in Rayleigh Satellite Return Link Channel (레일리 위성 리턴링크 채널에서 FEC 부호 방식 성능분석)

  • Lee Seong Ro;Cho Sung Eui;Oh Deock gil
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.12C
    • /
    • pp.1633-1641
    • /
    • 2004
  • In satellite digital broadcasting and satellite internet, severe burst errors occur in the high-speed return channel from the satellite to mobiles. In this paper, we analyze the performance of the forward error correction (FEC) coding method in the Rayleigh fading return channel. We first investigate the channel model of Loo, LutB, Vucetic and Corazza. We then compare the performance of the convolutional, Reed-Solomon (RS), convolution-RS concatenation, and Turbo codes in rayleigh fading channel.

Design and performance analysis of turbo codes employing the variable-sized interleaver (가변 크기 인터리버를 사용한 turbo 부호의 설계와 성능 해석)

  • Lee, Chang-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.28 no.2A
    • /
    • pp.86-95
    • /
    • 2003
  • With the advent of future mobile communication systems, the wireless transmission of the huge amount of multimedia data over the error-prone multipath fading channel has to overcome the inherent sensitivity to channel errors. To alleviate the effect of the channel errors, hosts of techniques based on the forward error correction(FEC) has been proposed at the cost of overhead rate. Among the FEC techniques, turbo code, whose performance has been shown to be very close to the Shannon limit, can be classified as a block-based error correction code. In this paper, considering the variable packet size of the multimedia data, we analyzed turbo codes employing the variable-sized interleaver. The effect of the various parameters on the BER performance is analyzed. We show that the turbo codes can be used as efficient error correction codes of multimedia data.

Reconstruction of Linear Cyclic Codes (미지의 선형 순회부호에 대한 복원기법)

  • Chung, Ha-Bong;Jang, Hwan-Seok;Cho, Won-Chan;Park, Cheal-Sun
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.36 no.10C
    • /
    • pp.605-613
    • /
    • 2011
  • In most digital communication systems over the noisy channel, some form of forward error correction scheme is employed for reliable communications. If one wants to recover the transmitted message without any knowledge of the error correcting codes employed, it is of utmost importance to figure out and reconstruct the error correcting codes. In this paper, we propose two algorithms of reconstructing linear cyclic codes from the corrupted received bit sequence, one for general linear binary cyclic codes and the other for Reed-Solomon codes. For two algorithms, we ran computer simulations and the performances are shown to be superior to those with the conventional LWM method.

Packet Size Optimization for Improving the Energy Efficiency in Body Sensor Networks

  • Domingo, Mari Carmen
    • ETRI Journal
    • /
    • v.33 no.3
    • /
    • pp.299-309
    • /
    • 2011
  • Energy consumption is a key issue in body sensor networks (BSNs) since energy-constrained sensors monitor the vital signs of human beings in healthcare applications. In this paper, packet size optimization for BSNs has been analyzed to improve the efficiency of energy consumption. Existing studies on packet size optimization in wireless sensor networks cannot be applied to BSNs because the different operational characteristics of nodes and the channel effects of in-body and on-body propagation cannot be captured. In this paper, automatic repeat request (ARQ), forward error correction (FEC) block codes, and FEC convolutional codes have been analyzed regarding their energy efficiency. The hop-length extension technique has been applied to improve this metric with FEC block codes. The theoretical analysis and the numerical evaluations reveal that exploiting FEC schemes improves the energy efficiency, increases the optimal payload packet size, and extends the hop length for all scenarios for in-body and on-body propagation.

CLR Performance Improvement of Random Traffic in the Wireless ATM Access Architecture (무선 ATM 접속구조에서 랜덤 트래픽의 셀 손실율 성능개선)

  • 김철순;이하철;곽경섭
    • Journal of Korea Multimedia Society
    • /
    • v.6 no.7
    • /
    • pp.1239-1244
    • /
    • 2003
  • In this paper, we analyzed cell loss rate performance for random traffic sources in wireless ATM(Asynchronous Transfer Mode) access architecture, which consists of access node and wireless channel. Applying queueing model to cell level at access node and considering burst error characteristics in wireless channel, we derived a formula about the cell loss rate of the random traffic in the wireless ATM access architecture. We also applied FEC(Forward Error Correction) schemes to improve the cell loss rate of random traffic. When we applied FEC schemes in the wireless ATM access architecture, we confirmed that the concatenated code provides the most superior performance compared to any other codes.

  • PDF

Energy-efficient Reconfigurable FEC Processor for Multi-standard Wireless Communication Systems

  • Li, Meng;der Perre, Liesbet Van;van Thillo, Wim;Lee, Youngjoo
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.17 no.3
    • /
    • pp.333-340
    • /
    • 2017
  • In this paper, we describe HW/SW co-optimizations for reconfigurable application specific instruction-set processors (ASIPs). Based on our previous very long instruction word (VLIW) ASIP, the proposed framework realizes various forward error-correction (FEC) algorithms for wireless communication systems. In order to enhance the energy efficiency, we newly introduce several design methodologies including high-radix algorithms, task-level out-of-order executions, and intensive resource allocations with loop-level rescheduling. The case study on the radix-4 turbo decoding shows that the proposed techniques improve the energy efficiency by 3.7 times compared to the previous architecture.

Performance Analysis on Wireless Sensor Network using LDPC Codes over Node-to-node Interference

  • Choi, Sang-Min;Moon, Byung-Hyun
    • Proceedings of the Korea Society of Information Technology Applications Conference
    • /
    • 2005.11a
    • /
    • pp.77-80
    • /
    • 2005
  • Wireless sensor networks(WSN) technology has various applications such as surveillance and information gathering in the uncontrollable area of human. One of major issues in WSN is the research for reducing the energy consumption and reliability of data. A system with forward error correction(FEC) can provide an objective reliability while using less transmission power than a system without FEC. In this paper, we propose to use LDPC codes of various code rate(0.53, 0.81, 0.91) for FEC for WSN. Also, we considered node-to-node interference in addition to AWGN channel. The proposed system has not only high reliable data transmission at low SNR, but also reduced transmission power usage.

  • PDF

Hardware implementation of a SOVA decoder for the 3GPP complied Turbo code (3GPP 규격의 터보 복호기 구현을 위한 SOVA 복호기의 하드웨어 구현)

  • 김주민;고태환;이원철;정덕진
    • Proceedings of the IEEK Conference
    • /
    • 2001.06a
    • /
    • pp.205-208
    • /
    • 2001
  • According to the IMT-2000 specification of 3GPP(3rd Generation Partnership Project) and 3GPP2, Turbo codes is selected as a FEC(forward error correction) code for even higher reliable data communication. In 3GPP complied IMT-2000 system, channel coding under consideration is the selective use of convolutional coding and Turbo codes of 1/3 code rate with 4 constraint length. Suggesting a new path metric normalization method, we achieved a low complexity and high performance SOVA decoder for Turbo Codes, Further more, we analyze the decoding performance with respect to update depth and find out the optimal value of it by using computer simulation. Based on the simulation result, we designed a SOVA decoder using VHDL and implemented it into the Altera EPF10K100GC503FPGA.

  • PDF

Analysis a LDPC code in the VDSL system (VDSL 시스템에서의 LDPC 코드 연구)

  • Joh, Kyung-Hyun;Kang, Hee-Hoon;Yi, Sang-Hoi;Na, Kuk-Hwan
    • Proceedings of the IEEK Conference
    • /
    • 2006.06a
    • /
    • pp.999-1000
    • /
    • 2006
  • The LDPC Code is focusing a powerful FEC(Forward Error Correction) codes for 4G Mobile Communication system. LDPC codes are used minimizing channel errors by modeling AWGN Channel as VDSL system. The performance of LDPC code is better than that of turbo code in long code word on iterative decoding algorithm. LDPC code are encoded by sparse parity check matrix. there are decoding algorithms for a LDPC code, Bit Flipping, Message passing, Sum-Product. Because LDPC Codes use low density parity bit, mathematical complexity is low and relating processing time becomes shorten.

  • PDF

Comparison of EXIT chart generation for LDPC and turbo codes (시뮬레이션 기법을 이용한 LDPC 부호와 터보부호에 대한 EXIT 차트 생성 비교)

  • Nyamukondiwa, Ramson Munyaradzi;Kim, Sooyoung
    • Journal of Satellite, Information and Communications
    • /
    • v.10 no.3
    • /
    • pp.73-77
    • /
    • 2015
  • In this paper, we present two simulation methods to investigate the effect of excluding bit errors on generating the extrinsic information transfer (EXIT) chart for low density parity check (LDPC) and turbo codes. We utilized the simulation methods including and excluding bit errors to generate EXIT chart which was originally proposed for turbo codes. The generated EXIT charts for LDPC and turbo codes shows that the presented methods appropriately demonstrates the performance behaviours of iterative decoding for LDPC and turbo codes. Analysis on the simulation results demonstrates that the EXIT chart excluding the bit errors shows only a small part of the curves where the amount of information is too large.