• 마이크로전자및패키징학회지
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• 제6권4호
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• pp.61-71
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• 1999

통신분야에서 사용주파수대역의 증가, 제품의 소형화 및 가격경쟁력등의 요구에 따라 RF 소자의 패키징 기술도 플라스틱 패키지 대신에 flip chip interconnection, MCM(multichip module)등과 같은 고밀도 실장기술이 발전해가고 있다. 따라서, 본 논문은 최근 수년간 보고된 응용사례를 중심으로 RF flip chip의 기술적인 개발방향과 장점들을 분석하였고, RF 소자 및 시스템의 개발단계에 따른 적합한 적용기술을 제시하였다. RF flip chip의 기술동향을 요약하면, 1) RF chip배선은 microstrip 대신에 CPW 구조을 선택하며, 2) wafer back-side grinding을 하지 않아서 제조공정이 단순하고 wafer 파손이 적어 제조비용을 낮출 수 있고, 3) wire bonding 패키징에 비해 전기적인 특성이 우수하고 고집적의 송수신 모듈개발에 적합하다는 것이다. 그러나, CPW 배선구조의 RF flip chip 특성에 대한 충분한 연구가 필요하며 RF flip chip의 초기 개발 단계에서 flip chip interconnection 방법으로는 Au stud bump bonding이 적합할 것으로 제안한다.

• 반도체디스플레이기술학회지
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• 제8권2호
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• pp.15-21
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• 2009

Atmospheric pressure plasma equipment was successfully applied to the flip chip BGA manufacturing process to improve the uniformity of flux printing process. The problem was characterized as shrinkage of the printed flux layer due to insufficient surface energy of the flip chip BGA substrate. To improve the hydrophilic characteristics of the flip chip BGA substrate, remote DBD type atmospheric pressure plasma equipment was developed and adapted to the flux print process. The equipment enhanced the surface energy of the substrate to reasonable level and made the flux be distributed over the entire flip chip BGA substrate uniformly. This research was the first adaptation of the atmospheric pressure plasma equipment to the flip chip BGA manufacturing process and a lot of possible applications are supposed to be extended to other PCB manufacturing processes such as organic cleaning, etc.

• 한국지능시스템학회논문지
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• 제23권4호
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• pp.286-291
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• 2013

대시야 백색광간섭계(WSI ; White Light Scanning Interferometer)를 이용하여, Flip Chip Bump 검사 공정에 적용하는 것을 목적으로 한 인라인 형태의 플립칩 범프 3차원 검사 장치를 개발한다. 여러 서브스트레이트에 있는 플립칩 범프 높이 측정 결과와 이에 의한 동일한 여러 범프에 대한 반복성 측정 실험 결과를 제시한다. 테스트 벤치에서의 실험 결과와 개발된 플립칩 범프 3차원 검사 장치에서의 실험 결과를 비교하였으며 진동의 영향이 감소되어 개선된 반복성 실험 결과를 얻을 수 있었다. 플립칩 범프 3차원 검사 장치의 검사성능을 평가할 수 있는 기준을 제시한다.

• 반도체디스플레이기술학회지
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• 제1권1호
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• pp.29-33
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• 2002

In the flip-chip process, the problem like electric defect or fatigue crack caused by the difference of CTE, between chip and substrate board had occurred. Underfill of flip chip to overcome this defects is noticed as important work developing in whole reliability of chip by protecting the chip against the external shock. In this paper, we introduce the underfill methods using mold and plunge and improvement of process and reliability, and the advantage which can be taken from embodiment of device.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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• pp.146-150
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• 2001

Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. S-parameters of on-chip and substrate were separately measured in the frequency range of 200 MHz to 20 GHz using a microwave network analyzer HP8510 and cascade probe. And the cascade transmission matrix conversion was performed. The same measurements and conversion techniques were conducted on the assembled test chip and substrate at the same frequency range. Then impedance values in ACF flip-chip interconnection were extracted from cascade transmission matrix. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of SiO$_2$filler to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. High frequency behavior of metal Au stud bumps was investigated. The resonance frequency of the metal stud bump interconnects is higher than that of ACF flip-chip interconnects and is not observed at the microwave frequency band. The extracted model parameters of adhesive flip chip interconnects were analyzed with the considerations of the characteristics of material and the design guideline of ACA flip chip for high frequency applications was provided.

• Journal of Welding and Joining
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• 제20권4호
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• pp.498-504
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• 2002

Fluxless flip chip bonding process using plasma treatment instead of flux was investigated. The effect of plasma process parameters on tin-oxide etching characteristics were estimated with Auger depth profile analysis. The die shear test was performed to evaluate the adhesion strength of the flip chip bonded after plasma treatment. The thickness of oxide layer on tin surface was reduced after Ar+H2 plasma treatment. The addition of H2 improved the oxide etching characteristics by plasma. The die shear strength of the plasma-treated Sn-Pb solder flip chip was higher than that of non-treated one but lower than that of fluxed one. The difference of the strength between plasma-treated specimen and non-treated one increased with increase in bonding temperature. The plasma-treated flip chip fractured at solder/TSM interface at low bonding temperature while the fracture occurred at solder/UBM interface at higher bonding temperature.

• 마이크로전자및패키징학회지
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• 제12권1호
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• pp.9-16
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• 2005

This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

• 한국공작기계학회논문집
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• 제16권6호
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• pp.181-186
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• 2007

UBM (Under Bump Metallurgy) of flip chip assemblies consists of several layers such as the solder wetting, the diffusion barrier, and the adhesion layers. In addition, IMC layers are formed between the solder wetting layers (e.g. Cu, Ni) and the solder. The primary failure mechanism of the solder joints in flip chips is widely known as the fatigue failure caused by thermal fatigues or electromigration damages. Sometimes, the premature brittle failure occurs in the IMC layers. However, these phenomena have thus far been viewed from only experimental investigations. In this sense, this paper presents a method for solid modeling of IMC layers in flip chip assemblies, thus providing a pre-processing tool for finite element analysis to simulate the IMC failure mechanism. The proposed modeling method is CSG-based and can also be applied to the modeling of UBM structure in flip chip assemblies. This is done by performing Boolean operations according to the actual sequences of fabrication processes

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 2nd Korea-Japan Advanceed Semiconductor Packaging Technology Seminar
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• pp.7-38
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• 2000

Performance, reliability, form factor drive flip chip use. BGAs and CSPs will provide stepping stone to FC DCA .Growing vendor infrastructure - Low cost, high density organic substrates -New generations of fluxes and underfills .Adhesives flip chip technology as a low cost flip chip alternatives -Low cost Au stud or Electroless Ni bumps -Reliable thermal cycling and electrical performance.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 International Symposium
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• pp.253-257
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• 2003

The low temperature flip chip technique is applied to the package of the temperature-sensitive devices for LCD systems and image sensors since the high temperature process degrades the polymer materials in their devices. We will introduce the various low temperature flip chip bonding techniques; a conventional flip chip technique using eutectic Bi-Sn (mp: $138^{\circ}C$) or eutectic In-Ag (mp: $141^{\circ}C$) solders, a direct bump-to-bump bonding technique using solder bumps, and a low temperature bonding technique using low temperature solder pads.