• 대한전자공학회논문지SD
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• 제38권12호
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• pp.25-35
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• 2001

복잡한 thin film transistor-liquid crystal display (TFT-LCD) array 회로의 전기적 특성을 분석하기 위해서는 PSPICE나 AIM-SPICE와 같은 회로 시뮬레이터를 사용하는 것이 필수적이다. 본 논문에서는 SPICE 시뮬레이션을 위한 다결정 실리콘 (poly-Si) TFT 소자의 입력 변수 추출을 체계화하는 방법을 도입한다. 이 방법을 excimer laser annealing 및 silicide mediated crystallization 방법으로 각각 제작된 다결정 실리콘 TFT 소자에 적용하여 실험 결과와 잘 일치하는 결과를 얻었다. SPICE 시뮬레이터 중에서 PSPICE는 graphic user interface(GUI) 방식의 편의성을 제공하므로 손쉽게 복잡한 회로를 구성할 수가 있다는 장점이 있으나, poly-Si TFT 소자 모델을 가지고 있지 않다. 이 연구에서는 PSPICE에 다결정 실리콘 TFT 소자 모델을 이식하고, TFT가 이식된 PSPICE를 사용하여 poly-Si TFT-LCD 단위 화소 및 라인 RC 지연을 고려한 화소에 대한 전기적 특성을 분석하였다. 이러한 결과는 TFT-LCD 어레이 특성 분석을 위한 시뮬레이션을 효율적으로 수행하는데 기여할 수 있을 것으로 기대된다.

• Journal of Information Display
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• 제5권1호
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• pp.1-6
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• 2004

Ion shower doping with a main ion source of $P_2H_x$ using a source gas mixture of $PH_3/H_2$ was conducted on excimer-laser- annealed (ELA) poly-Si. The crystallinity of the as-implanted samples was measured using a UV-transmittance. The measured value of as-implanted damage was found to correlate well with the one calculated through/obtained from TRIM-code simulation. The sheet resistance was found to decrease as the acceleration voltage increased from 1 kV to 15 kV at a doping time of 1 min. However, it increases as the acceleration voltage increases under severe doping conditions. Uncured damage after furnace annealing is responsible for the rise in sheet resistance.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.957-961
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• 2004

In order to realize high performance thin film transistor (TFT) on plastic substrate, Si film was deposited on plastic substrate at 170$^{\circ}C$ by using inductivity coupled plasma chemical vapor deposition (ICPCVD). Hydrogen concentration in as-deposited Si film was 3.8% which is much lower than that in film prepared by using conventional plasma enhanced chemical vapor deposition (PECVD). Si film was deposited as micro crystalline phase rather than amorphous phase even at 170$^{\circ}C$ because of high density plasma. By step-by-step Excimer laser annealing, dehydrogenation and recrystallization of Si film were carried out simultaneously. With step-by-step annealing and optimization of underlayer structure, it has succeeded to achieve large grain size of 300nm by using ICPCVD. Base on these results, poly-Si TFT was fabricated on plastic substrate successfully, and it is sufficient to drive pixels of OLEDs, as well as LCDs.

• 한국전기전자재료학회논문지
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• 제24권7호
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• pp.525-531
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• 2011

In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

• 한국전기전자재료학회논문지
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• 제17권5호
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• pp.467-475
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• 2004

ZnO epilayer were synthesized by the pulsed laser deposition(PLD) process on $Al_2$ $O_3$substrate after irradiating the surface of the ZnO sintered pellet by the ArF(193 nm) excimer laser. The epilayers of ZnO were achieved on sapphire(A $l_2$ $O_3$) substrate at a temperature of 400 $^{\circ}C$. The crystalline structure of epilayer was investigated by the photoluminescence and double crystal X-ray diffraction(DCXD). The carrier density and mobility of ZnO epilayer measured with Hall effect by van der Pauw method are 8.27${\times}$$10^{16}$$cm^{-3}$ and 299 $\textrm{cm}^2$/Vㆍs at 293 K, respectively. The temperature dependence of the energy band gap of the ZnO obtained from the absorption spectra was well described by the Varshni's relation, $E_{g}$(T)= 3.3973 eV - (2.69 ${\times}$ 10$_{-4}$ eV/K) $T^2$(T＋463k). After the as-grown ZnO epilayer was annealed in Zn atmospheres, oxygen and vaccum the origin of point defects of ZnO atmospheres has been investigated by the photoluminescence(PL) at 10 K. The native defects of $V_{Zn}$ , $V_{o}$ , Z $n_{int}$, and $O_{int}$ obtained by PL measurements were classified as a donors or accepters type. In addition, we concluded that the heat-treatment in the oxygen atmosphere converted ZnO thin films to an optical p-type. Also, we confirmed that vacuum in ZnO/A $l_2$ $O_3$did not form the native defects because vacuum in ZnO thin films existed in the form of stable bonds.s.s.s.

• 한국재료학회지
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• 제8권10호
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• pp.884-889
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• 1998

대면적의 비정질 실리콘 박막을 가우스 분포(Gaussian Profile)의 일차원 선형빔(line shape beam)을 가지는 엑시머 레이저를 사용하여 결정화를 시켰다. (Corning 7059 glass)위에 증착된 비정질 실리콘 박막이 재결정화된 실리콘 박막의 경우, 두께에따라 결정화되는 모양이 다르게 나타났다. 따라서 두께에 따라 결정화되는 상태의 변화를 조사하기 위하여 angle wrapping 방법을 새롭게 도입하여 깊이에 따른 Si층이 5${\mu}m$ 이상되도록 angle wrapping한 후에 박막의 두께에 따른 micro-raman spectra를 측정하여 결정화상태에 따른 잔류응력을 조사하였다. 또한 기판의 온도가 상온인 경우에 엑시머 레이저의 밀도가 300mJ/${cm}^2$에서 열처리한 경우에 재결정화된 Si 박막의 잔류응력에 박막의 표면에서 박막의 깊이에 따라 $1.3{\times}10^10$에서 $1.6{\times}10^10$을 거쳐 $1.9{\times}10^10$ dyne/${cm}^2$으로 phase의 변화에 따라 증가하였다. 또한 기판의 온도가 $400^{\circ}C$에서 최적의 열처리 에너지 밀도인 300mJ/${cm}^2$에서는 박막의 깊이에 따른 결정화 상태의변화에 따라 thermal stress 의 값이 $8.1{\times}10^9$에서 $9.0{\times}10^9$를 거쳐 $9.9{\times}10^9$ dyne/${cm}^2$으로 변화하는 것을 알 수 있다. 따라서 liquid phase에서 solid phaserk 변화함에 따라 stress값이 증가하는 것을 알 수 있다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 추계학술대회 논문집 Vol.16
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• pp.160-162
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• 2003

ZnO epilayer were synthesized by the pulesd laser deposition(PLD) process on $Al_2O_3$ substrate after irradiating the surface of the ZnO sintered pellet by the ArF(193nm) excimer laser. The substrate temperatures was $400^{\circ}C$. The crystalline structure of epilayer was investigated by the photoluminescence and double crystal X-ray diffraction (DCXD). The carrier density and mobility of ZnO epilayer measured with Hall effect by van der Pauw method are $8.27{\times}10^{16}\;cm^{-3}\;and\;299\;cm^2V{\cdot}s$ at 293 K, respectively. The temperature dependence of the energy band gap of the ZnO obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)\;=\;3.3973\;eV\;-\;(2.69{\times}10^{-4}\;eV/K)T^2/(T\;+\;463K)$. After the as-grown ZnO epilayer was annealed in Zn atmospheres, oxygen and vaccum the origin of point defects of ZnO atmospheres has been investigated by the photoluminescence(PL) at 10 K. The native defects of $V_{Zn}$, Vo, $Zn_{int}$, and $O_{int}$ obtained by PL measurements were classified as a donors or accepters type.

• 전자공학회논문지D
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• 제35D권6호
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• pp.46-53
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• 1998

저온 공정으로 제작되는 다결정 실리콘 박막 트랜지스터의 활성층을 이중 활성층(a-Si/a-SiN/sub x/)으로 제작하는 공정을 제안하고 다결정 실리콘 박막 트랜지스터를 제작하였다. 본 논문에서는 활성층의 아래쪽 실리콘 박막에 약간의 질소기를 첨가한 후 그 위에 순수한 비정질 실리콘 박막을 증착하여 엑시머 레이저의 에너지로 비정질 실리콘 박막을 결정화하여 사용하였다. 이중 활성층 (a-Si/a-SiN/sub x/)의 경우, 하부층의 NH₃/SiH₄ 유속비가 증가함에 따라, 상부 a-Si 층의 결정 성장이 촉진됨을 알 수 있었으나, n/sup +/ poly-SiN/sub x/ 층의 전도도 특성을 고려해 볼 때, NH₃/SiH₄ 유속비는 0.11의 상한치를 가짐을 알 수 있었다. 전계 방출 전류에 영향을 미치는 광학적 밴드갭의 경우, poly-Si 박막에 비해 증가하였으며, NH₃/SiH₄ 유속비가 0.11 이하에서도 0.1eV 정도의 증가를 보여, 이로 인하여 소자 제작시 전계 방출 전류가 억제될 것을 예상할 수 있다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.75-76
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• 2007

Poly-Si Schottky barrier Thin Film Transistor (SB-TFT) is manufactured with erbium silicided source/drain. High quality poly-Si film was obtained by crystallizing the amorphous Si film with Excimer laser annealing (ELA) method. The fabricated poly-Si SB-TFT devices showed low leakage current and large on/off current ratio. Moreover, the electrical characteristics were considerably improved by 3% $H_2/N_2$ gas annealing, which is attributed to the reduction of trap states at the grain boundaries and interface trap states at gate oxide/poly-si channel.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.1007-1010
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• 2004

We report crystallization of a-Si using XeCl excimer laser annealing [1] on the plastic substrate. We tried to obtain higher crystallinity as the effect of $CeO_2$ seed layer patterned. Also, we tried to control the direction of crystallization growth of silicon layer for lateral growth as the type of $CeO_2$ pattern. This crystallization method plays an important role in low temperature poly-Si (LTPS) [2] process and flexible display.