• Journal of KIISE:Computing Practices and Letters
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• v.6 no.2
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• pp.187-195
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• 2000

Embedded software generates its outputs using current states of the system as well as external inputs. When a module in embedded software is tested, we need an automated testing tool, which generates possible sequences to reach the module as well as input data of the module, to reduce the testing time and to improve the quality of software. In this paper, we use decision table to specify the functionality of the module and data-annotated MSC (Message Sequence Charts) to describe scenarios, and implement a tool, which we call MSCTest, to automate the testing process. MSCTest consists of MSC graphic editor, test sequence and data generator, and test driver generator. MSCTest is effectively applied to test EsWin which is a kind of window library used in embedded systems.

• Journal of KIISE:Databases
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• v.37 no.6
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• pp.324-332
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• 2010

The majority of event detection in real-time embedded sensor network systems is based on data fusion that uses noisy sensor data collected from complicated real-world environments. Current research has produced several excellent low-level mechanisms to collect sensor data and perform aggregation. However, solutions that enable these systems to provide real-time data processing using readings from heterogeneous sensors and subsequently detect complex events of interest in real-time fashion need further research. We are developing real-time event detection approaches which allow light-weight data fusion and do not require significant computing resources. Underlying the event detection framework is a collection of real-time monitoring and fusion mechanisms that are invoked upon the arrival of sensor data. The combination of these mechanisms and the framework has the potential to significantly improve the timeliness and reduce the resource requirements of embedded sensor networks. In addition to that, we discuss about a privacy that is foundation technique for trusted embedded sensor network system and explain anonymization technique to ensure privacy.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.103-111
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• 2019

The IoT-driven large-scaled systems consist of connected things with on-chip executable embedded software. These light-weighted embedded things have limited hardware space, especially small size of on-chip flash memory. In addition, on-chip embedded software in flash memory is not easy to update in runtime to equip with latest services in IoT-driven applications. It is becoming important to develop light-weighted IoT devices with various software in the limited on-chip flash memory. The remote instruction execution in cloud via IoT connectivity enables to provide high performance software execution with unlimited software instruction in cloud and low-power streaming of instruction execution in IoT edge devices. In this paper, we propose a Cloud-IoT asymmetric structure for providing high performance instruction execution in cloud, still low power code executable thing in light-weighted IoT edge environment using remote instruction execution. We propose a simulated approach to determine efficient partitioning of software runtime in cloud and IoT edge. We evaluated the instruction cloudification using remote instruction by determining the execution time by the proposed structure. The cloud-connected instruction set simulator is newly introduced to emulate the behavior of the processor. Experimental results of the cloud-IoT connected software execution using remote instruction showed the feasibility of cloudification of on-chip code flash memory. The simulation environment for cloud-connected code execution successfully emulates architectural operations of on-chip flash memory in cloud so that the various software services in IoT can be accelerated and performed in low-power by cloudification of remote instruction execution. The execution time of the program is reduced by 50% and the memory space is reduced by 24% when the cloud-connected code execution is used.

• Journal of Software Assessment and Valuation
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• v.17 no.2
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• pp.161-172
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• 2021

Neuromorphic architecture is drawing attention as a next-generation computing that supports artificial intelligence technology with low energy. However, FPGA embedded boards based on Neuromorphic architecturehave limited resources due to size and power. In this paper, we compared and evaluated the image reduction method using the interpolation method that rescales the size without considering the feature points and the DCT (Discrete Cosine Transform) method that preserves the feature points as much as possible based on energy. The scaled images were compared and analyzed for accuracy through CNN (Convolutional Neural Networks) in a PC environment and in the Nengo framework of an FPGA embedded board.. As a result of the experiment, DCT based classification showed about 1.9% higher performance than that of interpolation representation in both CNN and FPGA nengo environments. Based on the experimental results, when the DCT method is used in a limited resource environment such as an embedded board, a lot of resources are allocated to the expression of neurons used for classification, and the recognition rate is expected to increase.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.552-555
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• 2008

This paper represent a method of constructing the improved virtual reality systems. The proposed method be able to decrease the difference between reality and virtual reality. For the future, the proposed improved virtual reality systems are applied to advanced education, for example U-Learning is mixed with virtual reality based on Ubiquitous computing that is important highly information technology(IT) at $21^{th}$ knowledge based on informational society. Also, we respect to The Control system which is embedded in mixed reality.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.6
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• pp.615-628
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• 2015

CGRA (Coarse-Grained Reconfigurable Architecture) based multi-core architecture can be considered as a suitable solution for the fault-tolerant computing. However, there have been a few research projects based on fault-tolerant CGRA without exploiting the strengths of CGRA as well as their works are limited to single CGRA. Therefore, in this paper, we propose two approaches to enable exploiting the inherent redundancy and reconfigurability of the multi-CGRA for fault-recovery. One is a resilient inter-CGRA fabric that is ring-based sharing fabric (RSF) with minimal interconnection overhead. Another is a novel intra/inter-CGRA reconfiguration technique on RSF for maximizing utilization of the resources when faults occur. Experimental results show that the proposed approaches achieve up to 94% faulty recoverability with reducing area/delay/power by up to 15%/28.6%/31% when compared with completely connected fabric (CCF).

• Proceedings of the Korean Information Science Society Conference
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• 2005.11b
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• pp.373-375
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• 2005

디지털 홈이 구체화되면서 실내 환경조절, 방법, 가전기기 제어, 건강 모니터링 분야에서 센서 네트워크가 활용됨에 따라 이질적인 센서 네트워크간의 정보교환에 대한 요구가 증대하고 있다. 본 논문에서는 이러한 홈 환경에서 이질적인 센서 네트워크간 정보교환을 위한 메카니즘으로 홈 서버를 이용한 상호운영성 미들웨어 구조(Interoperable Middleware Architecture)를 제안한다. 이를 위하여, 홈 서버와 센서 네트워크 미들웨어 구조를 소개하고, 미들웨어가 상호운영성을 제공하기 위한 정보교환 메시지 포맷을 정의한다. 메시지 교환 양식은 XML 문서를 이용하고, 메시지 전송을 위한 프로토콜로 SOAP(Simple Object Access Protocol)을 선정한다. 본 논문의 적절성을 검증하기 위하여 홈 환경에서 이종 센서 네트워크간 점보교환 사례연구를 실시하고 이를 통해 확장성과 유연성을 보유한 정보교환 메카니즘의 효과를 확인한다.

• Journal of information and communication convergence engineering
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• v.9 no.1
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• pp.105-109
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• 2011

In this paper, we study the dominating-free sest which is defined as follows: k points called servers and n points called clients in the plane are given. For a point p in the plane is said to be dominated by a client c if for every server s, the distance between s and p is greater than the distance between s and c. The dominating-free set is the set of points in the plane which aren't dominated by any client. We present an O(nklogk+$n^2k$) time algorithm for computing the dominating-free set under the $L_1$-metric. Specially, we present an O(nlogn) time algorithm for the problem when k=2. The algorithm uses some variables and 1-dimensional arrays as its principle data structures, so it is easy to implement and runs fast.

• International Journal of Computer Science & Network Security
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• v.21 no.3
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• pp.153-164
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• 2021

The increasing importance of such fields as embedded systems, pervasive computing, and hybrid systems control is increasing attention to the time-dependent aspects of system modeling. In this paper, we focus on modeling conceptual time. Conceptual time is time represented in conceptual modeling, where the notion of time does not always play a major role. Time modeling in computing is far from exhibiting a unified and comprehensive framework, and is often handled in an ad hoc manner. This paper contributes to the establishment of a broader understanding of time in conceptual modeling based on a software and system engineering model denoted thinging machine (TM). TM modeling is founded on a one-category ontology called a thimac (thing/machine) that is used to elaborate the design and analysis of ontological presumptions. The issue under study is a sample of abstract modeling domains as exemplified by time. The goal is to provide better understanding of the TM model by supplementing it with a conceptualization of time aspects. The results reveal new characteristics of time and related notions such as space, events, and system behavior.

• Proceedings of the Korea Information Processing Society Conference
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• 2020.11a
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• pp.886-888
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• 2020

ONNX 은 인공신경망 모델 교환을 위한 표준 중 하나이다. 인공신경망 모델을 구현하는 연구자 입장에선 ONNX 형태로 모델을 배포함으로써 이질적인 플랫폼 간의 호환성을 보장받을 수 있다. 서로 다른 플랫폼에서 ONNX 표준에선 ONNX 모델을 실행하는 엔진을 ONNX Runtime 이라고 하는데, ONNX Runtime 은 순수 S/W 형태이거나, 다양한 H/W 가속 기술과 결합된 형태가 있다. 본 논문에선 ONNX Backend Scoreboard 에 등록 되어있는 3 종류의 엔진과 본 논문에서 새롭게 제안하는 C-ONNX 의 성능을 웍스테이션과 임베디드 기기에서 비교해보고 임베디드 기기에 특화된 C-ONNX 의 가능성에 대해 알아본다.