Journal of Software Assessment and Valuation (한국소프트웨어감정평가학회 논문지)

Korea Software Assessment and Valuation Society (한국소프트웨어감정평가학회)
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Feature Representation Method to Improve Image Classification Performance in FPGA Embedded Boards Based on Neuromorphic Architecture

뉴로모픽 구조 기반 FPGA 임베디드 보드에서 이미지 분류 성능 향상을 위한 특징 표현 방법 연구

  • 정재혁 (한남대학교 정보통신공학과) ;
  • 정진만 (인하대학교 컴퓨터공학과) ;
  • 윤영선 (한남대학교 정보통신공학과)
  • Received : 2021.11.29
  • Accepted : 2021.12.20
  • Published : 2021.12.31
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Abstract

Neuromorphic architecture is drawing attention as a next-generation computing that supports artificial intelligence technology with low energy. However, FPGA embedded boards based on Neuromorphic architecturehave limited resources due to size and power. In this paper, we compared and evaluated the image reduction method using the interpolation method that rescales the size without considering the feature points and the DCT (Discrete Cosine Transform) method that preserves the feature points as much as possible based on energy. The scaled images were compared and analyzed for accuracy through CNN (Convolutional Neural Networks) in a PC environment and in the Nengo framework of an FPGA embedded board.. As a result of the experiment, DCT based classification showed about 1.9% higher performance than that of interpolation representation in both CNN and FPGA nengo environments. Based on the experimental results, when the DCT method is used in a limited resource environment such as an embedded board, a lot of resources are allocated to the expression of neurons used for classification, and the recognition rate is expected to increase.

뉴로모픽 아키텍처는 저에너지로 인공지능 기술을 지원하는 차세대 컴퓨팅으로 주목받고 있다. 그러나 뉴로모픽 아키텍처 기반의 FPGA 임베디드 보드는 크기나 전력 등으로 인하여 가용 자원이 제한된다. 본 논문에서는 제한된 자원을 효율적으로 사용하기 위해 특징점의 고려 없이 크기를 재조정하는 보간법과 에너지 기반으로 특징점을 최대한 보존하는 DCT(Discrete Cosine Transform) 기법을 통한 특징 표현 방법을 비교 및 평가한다. 크기가 조정된 이미지는 일반적인 PC 환경에서와 FPGA 임베디드 보드의 Nengo 프레임워크에서 컨벌루션 신경망을 통해 정확도를 비교 분석했다. 실험 결과 PC의 컨벌루션 신경망과 FPGA Nengo 환경 모두에서 DCT 기반 분류 성능이 일반 보간법보다 약 1.9% 높은 성능을 보였다. 실험 결과를 바탕으로 뉴로모픽 구조 기반 FPGA 보드의 제한된 자원 환경에서 기존에 사용되던 보간법 대신 DCT 방식을 이용한다면 분류에 사용되는 뉴런의 표현에 많은 자원을 할당하여 인식률을 높일 수 있을 것으로 기대한다.

Keywords

Acknowledgement

이 논문은 2019년도 정부(과학기술정보통신부)의 재원으로 정보통신기획평가원의 지원을 받아 수행된 연구임(No.2019-0-00708, 뉴로모픽 아키텍처 기반 자율형 IoT 응용 통합개발환경).

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