• 한국위성정보통신학회논문지
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• 제7권2호
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• pp.18-24
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• 2012

본 논문에서는 ESD 방지를 위한 최적 방법론에 목표하여 확장된 드레인을 갖는 EDNMOS 소자의 더블 스냅백 현상 및 백그라운 도핑 농도 (BDC)의 영향을 조사하였다. 고전류 영역에서 낮은 BDC를 가진 EDNMOS 소자는 강한 스냅백으로 인해 취약한 ESD 성능과 높은 래치업 위험을 가지게 되나, 높은 BDC를 가진 EDNMOS 소자는 스냅백을 효과적으로 방지할 수 있음을 알 수 있었다. 따라서 BDC 제어로 안정적인 ESD 방지 성능과 래치업 면역을 구현할 수 있음을 밝혔다.

• ETRI Journal
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• 제30권6호
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• pp.833-843
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• 2008

The effect of forward and reverse electrostatic discharge (ESD) on the electro-optical characteristics of oxide vertical-cavity surface-emitting lasers is investigated using a human body model for the purpose of understanding degradation behavior. Forward ESD-induced degradation is complicated, showing three degradation phases depending on ESD voltage, while reverse ESD-induced degradation is relatively simple, exhibiting two phases of degradation divided by a sudden distinctive change in electro-optical characteristics. We demonstrate that the increase in the threshold current is mainly due to the increase in leakage current, nonradiative recombination current, and optical loss. The decrease in the slope efficiency is mainly due to the increase in optical loss.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.140-141
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• 2006

Background doping concentration (BDC) is proven to be a critical factor to affect the high current behavior of the extended drain NMOSFET (EDNMOS) devices. The EDNMOS device with low BDC suffers from strong snapback in the high current region, which results in poor electrostatic discharge (ESD) protection performance and high latchup risk. However, the strong snapback can be avoided in the EDNMOS device with high BDC. This implies that both the good ESD protection performance and the latchup immunity can be realized in terms of the EDNMOS by properly controlling its BDC.

• 한국위성정보통신학회논문지
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• 제8권1호
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• pp.45-53
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• 2013

기존의 NEDSCR 소자는 매우 낮은 스냅백 홀딩전압과 낮은 온-저항을 가져 정상적인 동작 동안 래치업을 초래하므로 ESD 보호소자로 사용하는데 어려움이 있었다. 본 연구에서는 NEDSCR 소자의 시뮬레이션 및 TLP 테스트를 통해 이러한 단점들을 극복할 수 있는 새로운 방법을 제안하였다. 매우 우수한 ESD 보호 성능과 높은 래치업 면역 특성을 구현하기 위해 N+ 소오스 확산영역을 둘러싸는 P형의 CPS 이온주입공정을 추가함으로써 NEDSCR 소자의 스냅백 홀딩전압과 온 저항을 증가시켜 정전기 보호 성능을 개선시킬 수 있는 것으로 입증되었다.

• ETRI Journal
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• 제45권3호
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• pp.543-550
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• 2023

Electrostatic discharge (ESD) testing for human body model tests is an essential part of the reliability evaluation of electronic/electrical devices and components. However, global environmental concerns have called for the need to replace the mercury-wetted relay switches, which have been used in ESD testers. Therefore, herein, we propose an ESD tester using metal oxide semiconductor-controlled thyristor (MCT) devices with a significantly higher rising rate of anode current (di/dt) characteristics. These MCTs, which have a breakdown voltage beyond 3000 V, were developed through an in-house foundry. As a replacement for the existing mercury relays, the proposed ESD tester with the developed MCT satisfies all the requirements stipulated in the JS-001 standard for conditions at or below 2000 V. Moreover, unlike traditional relays, the proposed ESD tester does not generate resonance; therefore, no additional circuitry is required for resonant removal. To the best of our knowledge, the proposed ESD tester is the first study to meet the JS-001 specification by applying a new switch instead of an existing mercury-wetted relay.

• 전자공학회논문지D
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• 제34D권12호
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• pp.1-7
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• 1997

Serious troubles may occur in electromagnetic equipments due to electrostatic discharge (ESD). The number of the damaging incidents are significantly increasing with the increased use of integrated semiconductor elements with loer operation pwoer. In order to examine the phenomena theoretically, this paper anlyzes properties of the transient electromagnetic fields rdiated by ESD. A new model is presented using the Rompe-weizel formula for the spark resistance. The numerical results of ESD fields are compared with the experimental data that were given by wilson-Ma.

• 한국산업안전학회:학술대회논문집
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• 한국안전학회 1998년도 춘계 학술논문발표회 논문집
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• pp.257-262
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• 1998

In order to understand the characteristics of electrostatic discharge (ESD) by a charged human body, a dynamic analysis method based on RCL circuit and a quasi-static analysis method based on two-body model are introduced. In this paper, these methods calculate waveforms, discharge energy and potential difference to analyze the ESD phenomena from given initial conditions and geometry. Results are compared and discussed.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2005년도 추계학술대회논문집
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• pp.318-323
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• 2005

This paper introduces the mechanism of the ESD (Electrostatic discharge) in the HDD spindle system using FDBs (Fluid Dynamic Bearings). When a HDD (Hard Disk Drive) spindle system is rotating, triboelectric charging occurs in the FDBs through the friction of the lubricant between the rotating shaft and stationary sleeve. And this electrostatic charge is accumulated in the rotating part of the HDD spindle system because it is insulated from the ground by the lubricant. This research shows experimentally that the behavior of electric charge and discharge in the FDB spindle system is the same as that of a capacitor. It also measures the electrostatic charge and discharge of the FDB spindle system due to the chanse of humidity, supporting load and motor speed. This research shows that the control of ESD is required in the HDD spindle system using FDBs, because the electrostatic charge accumulated in the FDB spindle system may cause the breakdown damage of the GMR head and data loss consequently.

• 한국안전학회지
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• 제35권1호
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• pp.1-11
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• 2020

Article 325 (Prevention of Fire Explosion due to Electrostatic) of the Rule for Occupational Safety and Health Standard specifies that in order to prevent the risk of disasters caused by static electricity, fire, explosion and static electricity in the production process, However, in order to do this, it is absolutely necessary to use a pre-detection technology and a detector for antistatic discharge prediction, which is a precautionary measure by static electricity in a fire / explosion hazard place, but in Korea, And there is no technical standard for the application of the technology of the explosion proof structure of the related equipment. Research methods include domestic and overseas electrostatic discharge detection technology and literature investigation of related equipment explosion proofing technology, domestic and foreign electrostatic discharge detection device production and use situation investigation, advanced foreign technology data analysis and benchmarking. In particular, we sought to verify the results of empirical experiments using electrostatic discharge detection technology through sample purchase and analysis of related major products, development of optimization technology through prototype production, evaluation, and supplementation, and expert knowledge through expert consultation. The results of this study were developed and fabricated two prototypes of electrostatic discharge detector based on the technology / standard related to electrostatic discharge detection technology in Korea and abroad through development of electrostatic discharge detection technology and development and production of detector. In addition, based on the development of electrostatic discharge detection technology, we developed an intrinsic safety explosion proof ib class explosion proof technology applicable to the process of using and handling flammable gas and flammable liquid vapor and combustible dust. In the case of the over voltage and minimum voltage are supplied to the explosion-proof structure ESD detector, check the state of the circuit and the transient and transient currents generated by the coil and capacitor elements during the input and standby of the signal pulse voltage. Explosion-proof equipment-Part 11: Intrinsically safe explosion proof structure The comparative evaluation with the reference curve in Annex A of "i" confirms that the characteristics of the intrinsically safe explosion protection structure are met.

• 한국안전학회지
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• 제14권3호
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• pp.69-77
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• 1999

As the use of automatic handling equipment for sensitive semiconductor devices is rapidly increased, manufacturers of electronic components and equipment need to be more alert to the problem of electrostatic discharges(ESD). Semiconductor devices such as IC, LSI, VLSI become a high density pattern of being more fragile by ESD phenomena. One of the most common causes of electrostatic damage is the direct transfer of electrostatic charge from the human body or a charged material to the electrostatic discharge sensitive devices. Accordingly, characteristics of electrostatic attenuation in domestic semiconductor devices is investigated to evaluate the ESD phenomina in the semiconductors in this paper. The required data are obtained by Static Honestmeter. Also The results in this paper can be used for the prevention of semiconductor failure by ESD.