• 한국태양에너지학회:학술대회논문집
• /
• 한국태양에너지학회 2011년도 추계학술발표대회 논문집
• /
• pp.158-163
• /
• 2011

Recently, more attention has been paid to DSC(Dye-sensitized Solar Cell) with the potential of glazing applications. The aim of the study is to analyze thermal and electrical performance according to composition of glazing with DSC. For this study, the electrical and thermal performance of glazing with DSC modules were measured and their result were compared. The measurement were performed according to the KS L2525 and with a solar simulator of DSC modules. The result show that the U-value of the DSC double glazings with clear glass and low-e glass were 2.78 $W/m^2K$ and 1.70 $W/m^2K$, respectively. The electrical measurement indicated that the electrical efficiency of the DSC double glazings with clear glass and low-e glass decreaced by 9.9% and 13.3%, respectively, compared to the DSC medules electrical performance.

• 전력전자학회논문지
• /
• 제24권1호
• /
• pp.16-24
• /
• 2019

The performance of the battery management system (BMS) algorithm is important for ensuring the stability and efficient operation of battery packs. Such a performance is determined by the internal parameters of the electrical equivalent circuit model (EECM). This study proposes a performance improvement and verification of battery parameters for the BMS algorithm using electrical experiments and tools. The parameters were extracted through electrical characteristic experiments, and an EECM based on Ah counting was designed. Simulation results using the EECM were compared with actual experimental data to determine the best parameter extraction method.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
• /
• pp.601-604
• /
• 2002

We propose modified fence electrode structure for manufacturing of ITO-electrode-free PDP. Luminance, luminance efficiency and addressing time for the proposed structure shows performance improvement about 25 percent. Our results can be used for the reduction of manufacturing cost without degradation of PDP performance.

• 전기학회논문지
• /
• 제66권6호
• /
• pp.885-891
• /
• 2017

The energy storage system(ESS) is a core component for exchanging the power system structure of the unidirectional power flow into a bidirectional structure. Its important role has been increasing because it has multiple functions such as output stabilization of new renewable energy, demand management, frequency regulation, etc. However, the performance evaluation technology of ESS in korea is lower than one of advanced countries and the recognition of standardization is also lack compared to advanced countries. Furthermore, in order to more accurately and reliably validate the performance of the ESS in advanced countries, it has been required to perform not only performance testing by H/W devices but also performance verification by S/W tool. Therefore, in order to verify the performance testing of ESS by S/W tool, this paper proposes the modeling method of performance testing devices for MW scaled ESS by using the PSCAD/EMTDC S/W, based on real testing devices in domestic institute. From the simulation results of proposed modeling method, it is confirmed that the proposed modeling method is a useful tool for performance validation of ESS.

• 전기학회논문지
• /
• 제59권12호
• /
• pp.2179-2189
• /
• 2010

This paper deals with analytical techniques for performance evaluation of small scaled wind power generator with outer permanent magnet rotor. In part (1), using transfer relations theorem, magnetic field distribution characteristics by PM and armature reaction field are derived. Moreover, electrical parameters such as back-EMF, inductance and resistance are calculated from the obtained field characteristic equations. The proposed analytical techniques are validated by nonlinear finite element method using commercial software 'Maxwell' and performance experiments of the manufactured generator. In part (2), generating characteristics analysis such as constant speed characteristics and constant resistive load characteristics, and performance evaluation according to variation of wind speed will be accomplished using the derived electrical parameters.

• Transactions on Electrical and Electronic Materials
• /
• 제14권6호
• /
• pp.291-294
• /
• 2013

When subjected to a change in dimensions, the device performance decreases. Multi-gate SOI devices, viz. the Double Gate MOSFET (DG-MOSFET), are expected to make inroads into integrated circuit applications previously dominated exclusively by planar MOSFETs. The primary focus of attention is how channel engineering (i.e. Graded Channel (GC)) and gate engineering (i.e. Dual Insulator (DI)) as gate oxide) creates an effect on the device performance, specifically, leakage current ($I_{off}$), on current ($I_{on}$), and DIBL. This study examines the performance of the devices, by virtue of a simulation analysis, in conjunction with N-channel DG-MOSFETs. The important parameters for improvement in circuit speed and power consumption are discussed. From the analysis, DG-DI MOSFET is the most suitable candidate for high speed switching application, simultaneously providing better performance as an amplifier.

• International Journal of Precision Engineering and Manufacturing
• /
• 제9권3호
• /
• pp.72-74
• /
• 2008

We investigate the effect of mechanical damping and electrical conductivity on the dynamic performance of a new electromagnetic engine valve actuator that employs a permanent magnet. The key dynamic performance factors are the transition time and the landing velocity of the armature. Two-dimensional dynamic finite element analyses are performed to simulate a coupled system. The results show that mechanical damping and electrical conductivity have similar effects on the dynamic performance of the engine valve actuator. Subsequently, it is possible to replace the role of mechanical damping by controlling the electrical conductivity through the thickness and number of steel core laminations.

• ETRI Journal
• /
• 제35권2호
• /
• pp.259-269
• /
• 2013

Android has become the most popular platform for mobile devices. However, Android still has critical performance issues, such as "application not responding" errors and hiccups resulting from garbage collection. Many phone vendors have tried to resolve the problems by characterizing and improving the performance. However, there are few insightful performance analysis tools for the Android-based systems. This paper presents AndroScope, which is a performance analysis tool for both the Android platform (Dalvik virtual machine, core libraries, Android libraries, and even Linux kernels) and its applications. To the best of our knowledge, this is the first tool to collect and analyze performance data from all the software layers of the Android-based systems. AndroScope offers a trace mechanism to collect such deep and wide performance data as hardware performance counters, time, and memory usage. In addition, the tool includes TraceBridge, which is a middleware for the fast handling of mass logs. Moreover, AndroScope offers an integrated graphical user interface with the Android software development kit to display a great volume of the detailed performance data.

• Transactions on Electrical and Electronic Materials
• /
• 제16권5호
• /
• pp.241-249
• /
• 2015

Phase-locked-loops (PLL) have been employed in high-speed data transmission systems like wireless transceivers, disk read/write channels and high-speed interfaces. The majority of the researchers use a charge pump (CP) to obtain high performance from PLLs. This paper presents a review of various CMOS CP schemes that have been implemented for PLLs and the relationship between the CP parameters with PLL performance. The CP architecture is evaluated by its current matching, charge sharing, voltage output range, linearity and power consumption characteristics. This review shows that the CP has significant impact on the quality performance of CP PLLs.

• 전자공학회논문지D
• /
• 제35D권4호
• /
• pp.61-70
• /
• 1998

The electrical performance of a package is extremely important for high speed digital system operations. CSP(chip scale package) is known to have better electrical performance than the convnetional packages. In this paper, the electrical performance of the BLP(bottom leaded plastic) package, a kind of CSP, has been alayzed by both simulation and real measurement. The electrical perfdormance of a BLP was compared with that of the conventioanl TSOP(thin small outline package). The leadinductanceand lead capacitance were used for the comparison purposes. The new BLP design provides much better electrical performance that TSOP package. It has about 40% favorable parameter values.