• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.69-74
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• 2010

A new package substrate for dynamic random access memory(DRAM) devices has been developed using selective aluminum anodization. Unlike the conventional substrate structure commonly made by laminating epoxy-based core and copper clad, this substrate consists of bottom aluminum, middle anodic aluminum oxide and top copper. Anodization process on the aluminum substrate provides thick aluminum oxide used as a dielectric layer in the package substrate. Placing copper traces on the anodic aluminum oxide layer, the resulting two-layer metal structure is completed in the package substrate. Selective anodization process makes it possible to construct a fully filled via structure. Also, putting vias directly in the bonding pads and the ball pads in the substrate design, via in pad structure is applied in this work. These arrangement of via in pad and two-layer metal structure make routing easier and thus provide more design flexibility. In a substrate design, all signal lines are routed based on the transmission line scheme of finite-width coplanar waveguide or microstrip with a characteristic impedance of about $50{\Omega}$ for better signal transmission. The property and performance of anodic alumina based package substrate such as layer structure, design method, fabrication process and measurement characteristics are investigated in detail.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.1
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• pp.65-72
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• 2010

Nowadays, most hospitals have been used to create MRI or CT and managed them. Doctors depend on fast access to images such as magnetic resonance imaging (MRIs), computerized tomography (CT) scans, and X-rays for accurate diagnoses. Those image data are related privacy of a patient. Therefore, it should be protected from hackers and managed perfectly. In this paper, we propose a data hiding method into MRI or CT related a condition and intervention of a patient, and it is suggested that how to authenticate patient information from an image. In this way, we create hash code using HMAC with patient information, and hash code and patient information is hided into an image. After then, doctor will check authentication using HMAC. In addition, we use a reversible data hiding DE(Difference Expansion) algorithm to hide patient information. This technique is possible to reconstruct the original image with stego image. Therefore, doctor can easily be possible to check condition of a patient. As a consequence of an experiment with MRI image, data hiding, extraction and reconstruct is shown compact performance.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.1
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• pp.35-43
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• 2010

1D PCA utilized in the face appearance-based face recognition methods such as eigenface-based face recognition method may lead to less face representative power and more computational cost due to the resulting 1D face appearance data vector of high dimensionality. To resolve such problems of 1D PCA, 2D PCA-based face recognition methods had been developed. However, the face representation model obtained by direct application of 2D PCA to a face image set includes both face common features and face distinctive identity features. Face common features not only prevent face recognizability but also cause more computational cost. In this paper, we first develope a model of a face distinctive identity feature subspace separated from the effects of face common features in the face feature space obtained by application of 2D PCA analysis. Then, a novel robust face recognition based on the face distinctive identity feature subspace model is proposed. The proposed face recognition method based on the face distinctive identity feature subspace shows better performance than the conventional PCA-based methods (1D PCA-based one and 2D PCA-based one) with respect to recognition rate and processing time since it depends only on the face distinctive identity features. This is verified through various experiments using Yale A and IMM face database consisting of face images with various face poses under various illumination conditions.

• Korean Journal of Optics and Photonics
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• v.5 no.3
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• pp.423-430
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• 1994

We designed and fabricated the single mode fiber pigtailed DFB-LD module for 2.5 Gbps optical communication system. In the design of the DFB-LD module, we made the module divided into two parts of inner sub-module and outer 14-pin butterfly package and cylindrical shaped sub-module contain quasi confocal 2 lens system including optical isolator and electrical connection between these parts via hybrid substrate of bias T circuit. Laser welding was used to assemble the sub-module which requires accurate fixing between optical elements. The fabricated DFB-LD module showed optical coupling efficiency of 20% and - 3 dB small signal response of more than 2.6 GHz. We confirmed mechanical reliability of the module by temperature cycle test where the tested module exhibit optical power fluctuation of less than 10%. Finally we evaluated the performance of the fabricated DFB-LD module as light source of 2.5 Gbps optical communication system, sensitivity of - 30.2 dBm was obtained through 47 km optical fiber transmission under the criterion of $1\times10^{-10}$ BER and transmission penalties were 1.5 dB caused by extinction ratio and 1.0 dB caused by chromatic dispersion of normal single mode fiber. fiber.

• Proceedings of the KSRS Conference
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• 2008.10a
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• pp.220-223
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• 2008

A camera system for the satellite application performs the mission of observation by measuring radiated light energy from the target on the earth. As a development stage of the system, the signal level analysis by estimating the number of electron collected in a pixel of an applied CCD is a basic tool for the performance analysis like SNR as well as the data path design of focal plane electronic. In this paper, two methods are presented for the calculation of the number of electrons for signal level analysis. One method is a quantitative assessment based on the CCD characteristics and design parameters of optical module of the system itself in which optical module works for concentrating the light energy onto the focal plane where CCD is located to convert light energy into electrical signal. The other method compares the design\ parameters of the system such as quantum efficiency, focal length and the aperture size of the optics in comparison with existing camera system in orbit. By this way, relative count of electrons to the existing camera system is estimated. The number of electrons, as signal level of the camera system, calculated by described methods is used to design input circuits of AD converter for interfacing the image signal coming from the CCD module in the focal plane electronics. This number is also used for the analysis of the signal level of the CCD output which is critical parameter to design data path between CCD and A/D converter. The FPE(Focal Plane Electronics) designer should decide whether the dividing-circuit is necessary or not between them from the analysis. If it is necessary, the optimized dividing factor of the level should be implemented. This paper describes the analysis of the electron count of a camera system for a satellite application and then of the signal level for the interface design between CCD and A/D converter using two methods. One is a quantitative assessment based on the design parameters of the camera system, the other method compares the design parameters in comparison with those of the existing camera system in orbit for relative counting of the electrons and the signal level estimation. Chapter 2 describes the radiometry of the camera system of a satellite application to show equations for electron counting, Chapter 3 describes a camera system briefly to explain the data flow of imagery information from CCD and Chapter 4 explains the two methods for the analysis of the number of electrons and the signal level. Then conclusion is made in chapter 5.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.19-24
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• 2016

In Long Term Evolution-Advanced (LTE-A), small cell enhancement(SCE) has been developed as a cost-effective way of supporting exponentially increasing demand of wireless data services and satisfying the user quality of service(QoS). However, due to the dense and irregular distribution of a large number of small cells, the offloading scheme should be applied in the small cell network. In this paper, we propose an user offloading scheme for SCE in LTE-Advanced system. We divide the small cells into different clusters according to the reference signal received power(RSRP) from user equipment(UE). Within a cluster, We apply the user offloading scheme with the consideration of the number of users and interference conditions. Simulation results show that proposed scheme can improve the throughput, and spectral efficiency of small cell users. Eventually, proposed scheme can improve overall cell performance.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.13-18
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• 2016

In Long Term Evolution-Advanced (LTE-A), small cell enhancement(SCE) has been developed as a cost-effective way of supporting exponentially increasing demand of wireless data services and satisfying the user quality of service(QoS). However, there are many problems such as the transmission rate and transmission quality degradation due to the dense and irregular distribution of a large number of small cells. In this paper, we propose a clustering based interference management scheme in dense small cell network. We divide the small cells into different clusters according to the reference signal received power(RSRP) from user equipment(UE). Within a cluster, an almost blank subframe(ABS) is implemented to mitigate interference between the small cells. In addition, we apply the power control to reduce the interference between the clusters. Simulation results show that proposed scheme can improve Signal to Interference plus Noise Ratio(SINR), throughput, and spectral efficiency of small cell users. Eventually, proposed scheme can improve overall cell performance.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.74-85
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• 2015

PCI Express is a well-known and widely used de-facto system bus standard for connecting among a processor and IO devices. PCI Express is originated from old PCI standard, and its most of applications are limited to be used within a PC or server system. But, because of its fast speed, low power consumption, and good protocol efficiency, it is considered as one of a good candidate for an alternate system interconnect for many years. In this paper, we present design, implementation and early evaluation of an alternate system interconnect by utilizing PCI Express. The developed alternate system interconnect using PCI Express (named PCIeLINK) utilizes non-transparent bridging (NTB) technic which generally used in fail-over system in PCI and PCI Express. By using NTB technic, PCI Express device can be extended to outside of a system without electrical and logical problems arising during system boot and enumeration. To build up an alternate system interconnect, we designed and implemented a network interface card having multiple PCI Express ${\times}4$ connections (theoretically 20 Gbps) and tested, The early test results revealed that an ${\times}4$ port in the card showed 8.6 Gbps peak performance for bulk transmission and 5.1 Gbps peak for normal TCP/IP transfer.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.34-39
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• 2016

A low-voltage, low-power analog front-end IC for neural recording implant devices is presented. The proposed IC consists of a low-noise neural amplifier and a programmable active bandpass filter to process neural signals residing in the band of 1 Hz to 5 kHz. The neural amplifier is based on a source-degenerated folded-cascode operational transconductance amplifier (OTA) for good noise performance while the following bandpass filter utilizes a low-power current-mirror based OTA with programmable high-pass cutoff frequencies from 1 Hz to 300 Hz and low-pass cutoff frequencies from 300 Hz to 8 kHz. The total recording analog front-end provides 53.1 dB of voltage gain, $4.68{\mu}Vrms$ of integrated input referred noise within 1 Hz to 10 kHz, and noise efficiency factor of 3.67. The IC is designed using $18-{\mu}m$ CMOS process and consumes a total of $3.2{\mu}W$ at 1-V supply voltage. The layout area of the IC is $0.19 mm^2$.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.9
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• pp.136-143
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• 2013

In this paper, a algorithm to find joints of a small animal like a lizard from the multiple-view silhouette images is presented. The proposed algorithm is able to calculate the 3D coordinates so that the locomotion of the lizard is markerlessly reconstructed. The silhouette images of the lizard was obtained by a adaptive threshold algorithm. The skeleton image of the silhouette image was obtained by Zhang-Suen method. The back-bone line, head and tail point were detected with the A* search algorithm and the elimination of the ortho-diagonal connection algorithm. Shoulder joints and hip joints of a lizard were found by $3{\times}3$ masking of the thicked back-bone line. Foot points were obtained by morphology calculation. Finally elbow and knee joint were calculated by the ortho distance from the lines of foot points and shoulder/hip joint. The performance of the suggested algorithm was evaluated through the experiment of detecting joints of a small lizard.