• Title/Summary/Keyword: effective capacitance

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A Study On The Performances Of A Single-Phase Motor With Non-Quadrature Stator Windings Using Domestic Magnetic Materials. (국산자기재료를 이용한 비대칭자속분포 단상유도기구)

  • Min Ho Park
    • 전기의세계
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    • v.21 no.3
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    • pp.41-47
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    • 1972
  • The requirements of a successful design for single phase induction motors with a high efficiency have, in recent years, led to the use of non-quadrature stator windings motors in which a high starting torque is a prime requisite. The capacitor motor is one of above machines in which various possible forms of asymmetry can be occur. These forms of asymmetry in the stator phase windings, encountered in machine designs, are 1) an asymmetrical disposition in space of their magnetic axes, 2) a difference in their effective number of turns, 3) a difference in the distribution of their coil groups per pole and 4) amounts of capacitance of an auxiary winding. In order to apply the effective performance prediction of these form to motors, mading of lower quality-domestic magnetic materials, the analysis and the experimental investigations of its sample motors are described in this paper. The utility of such a motor is demonstrated and it is shown that the effects- a good efficiency, good power factor and high starting torque-of the motor mechanism with non-quadrature stator phase windings can development disadvantages by using the lower quality-domestis magnetic materials.

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Electrical Properties of Field Effect Transistor using F16CuPc (F16CuPc를 이용한 Field Effect Transistor의 전기적 특성 연구)

  • Lee, Ho-Shik;Park, Young-Pil;Cheon, Min-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.389-390
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    • 2008
  • We fabricated organic field-effect transistors (OFETs) based a fluorinated copper phthalocyanine ($F_{16}CuPc$) as an active layer. And we observed the surface morphology of the $F_{16}CuPc$ thin film. The $F_{16}CuPc$ thin film thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in $F_{16}CuPc$ FET and we calculated the effective mobility.

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A Switch-Level CMOS Delay Time Modeling and Parameter Extraction (스위치 레벨 CMOS 지연시간 모델링과 파라미터 추출)

  • 김경호;이영근;이상헌;박송배
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.1
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    • pp.52-59
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    • 1991
  • An effective and accurate delay time model is the key problem in the simulation and timing verification of CMOS logic circuits. We propose a semi-analytic CMOW delay time model taking into account the configuration ratio, the input waveform slope and the load capacitance. This model is based on the Schichman Hodges's DC equations and derived on the optimally weighted switching peak current. The parameters necessary for the model calculation are automatically determined from the program. The proposed model is computationally effective and the error is typically within 10% of the SPICEA results. Compared to the table RC model, the accuracy is inproved over two times in average.

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Properties of FET using Activative Materials with F16CuPc (F16CuPc를 활성층으로 사용한 FET의 특성 연구)

  • Lee, Ho-Shik;Park, Young-Pil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.04b
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    • pp.43-44
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    • 2009
  • We fabricated organic field-effect transistors (OFETs) based a fluorinated copper phthalocyanine ($F_{16}CuPc$) as an active layer. And we observed the surface morphology of the $F_{16}CuPc$ thin film. The $F_{16}CuPc$ thin film thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in $F_{16}CuPc$ FET and we calculated the effective mobility.

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Electrical Properties of FET using F16CuPc (F16CuPc를 이용한 FET의 전기적 특성 연구)

  • Lee, Ho-Shik;Park, Young-Pil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.504-505
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    • 2008
  • We fabricated organic field-effect transistors (OFETs) based a fluorinated copper phthalocyanine ($F_{16}CuPc$) as an active layer. And we observed the surface morphology of the $F_{16}CuPc$ thin film. The $F_{16}CuPc$ thin film thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in $F_{16}CuPc$ FET and we calculated the effective mobility.

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Third order Sigma-Delta Modulator with Delayed Feed-forward Path for Low-power Operation (저전력 동작을 위한 지연된 피드-포워드 경로를 갖는 3차 시그마-델타 변조기)

  • Lee, Minwoong;Lee, Jongyeol
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.10
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    • pp.57-63
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    • 2014
  • This paper proposes an architecture of $3^{rd}$ order SDM(Sigma-Delta Modulator) with delayed feed-forward path in order to reduce the power consumption and area. The proposed SDM improve the architecture of conventional $3^{rd}$ order SDM which consists of two integrators. The proposed architecture can increase the coefficient values of first stage doubly by inserting the delayed feed-forward path. Accordingly, compared with the conventional architecture, the capacitor value($C_I$) of first integrator is reduced by half. Thus, because the load capacitance of first integrator became the half of original value, the output current of first op-amp is reduced as 51% and the capacitance area of first integrator is reduced as 48%. Therefore, the proposed method can optimize the power and the area. The proposed architecture in this paper is simulated under conditions which are supply voltage of 1.8V, input signal 1Vpp/1KHz, signal bandwidth of 24KHz and sampling frequency of 2.8224MHz in the 0.18um CMOS process. The simulation results are SNR(Signal to Noise Ratio) of 88.9dB and ENOB(Effective Number of Bits) of 14-bits. The total power consumption of the proposed SDM is $180{\mu}W$.

10Gb/s CMOS Transimpedance Amplifier Designs for Optical Communications (광통신용 10Gb/s CMOS 전치증폭기 설계)

  • Sim, Su-Jeong;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.10 s.352
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    • pp.1-9
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    • 2006
  • In this paper, a couple of 10Gb/s transimpedance amplifiers are realized in a 0.18um standard CMOS technology for optical communication applications. First, the voltage-mode inverter TIA(I-TIA) exploits inverter input configuration to achieve larger effective gm, thus reducing the input impedance and increasing the bandwidth. I-TIA demonstrates $56dB{\Omega}$ transimpedance gain, 14GHz bandwidth for 0.25pF photodiode capacitance, and -16.5dBm optical sensitivity for 0.5A/W responsivity, 9dB extinction ration and $10^{-12}$ BER. However, both its inherent parasitic capacitance and the package parasitics deteriorate the bandwidth significantly, thus mandating very judicious circuit design. Meanwhile, the current-mode RGC TIA incorporates the regulated cascade input configuration, and thus isolates the large input parasitic capacitance from the bandwidth determination more effectively than the voltage-mode TIA. Also, the parasitic components give much less impact on its bandwidth. RGC TIA provides $60dB{\Omega}$ transimpedance gain, 10GHz bandwidth for 0.25pF photodiode capacitance, and -15.7dBm optical sensitivity for 0.5A/W responsivity, 9dB extinction ration and $10^{-12}$ BER. Main drawback is the power dissipation which is 4.5 times larger than the I-TIA.

Effective Volume of the Korea Research Institute of Standards and Science Free Air Chamber L1 for Low-Energy X-Ray Measurement

  • Chul-Young Yi;Yun Ho Kim;Don Yeong Jeong
    • Progress in Medical Physics
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    • v.33 no.1
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    • pp.1-9
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    • 2022
  • Purpose: To evaluate the effective volume of the Korea Research Institute of Standards and Science free air chamber (KRISS FAC) L1 used for the primary standard device of the low-energy X-ray air kerma. Methods: The mechanical dimensions were measured using a 3-dimensional coordinate measuring machine (3-d CMM, Model UMM 500, Carl Zeiss). The diameter of the diaphragm was measured by a ring gauge calibrator (Model KRISS-DM1, KRISS). The elongation of the collector length due to electric field distortion was determined from the capacitance measurement of the KRISS FAC considering the result of the finite element method (FEM) analysis using the code QuickField v6.4. Results: The measured length of the collector was 15.8003±0.0014 mm with a 68% confidence level (k=1). The aperture diameter of the diaphragm was 10.0021±0.0002 mm (k=1). The mechanical measurement volume of the KRISS FAC L1 was 1.2415±0.0006 cm3 (k=1). The elongated length of the collector due to the electric field distortion was 0.170±0.021 mm. Considering the elongated length, the effective measurement volume of the KRISS FAC L1 was 1.2548±0.0019 cm3(k=1). Conclusions: The effective volume of the KRISS FAC L1 was determined from the mechanically measured value by adding the elongated volume due to the electric field distortion in the FAC. The effective volume will replace the existing mechanically determined volume in establishing and maintaining the primary standard of the low-energy X-ray.

Passivation property of Al2O3 thin film for the application of n-type crystalline Si solar cells (N-type 결정질 실리콘 태양전지 응용을 위한 Al2O3 박막의 패시베이션 특성 연구)

  • Jeong, Myung-Il;Choi, Chel-Jong
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.24 no.3
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    • pp.106-110
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    • 2014
  • The passivation property of $Al_2O_3$ thin film formed using atomic layer deposition (ALD) for the application of crystalline Si solar cells was investigated using microwave photoconductance decay (${\mu}$-PCD). After post-annealing at $400^{\circ}C$ for 5 min, $Al_2O_3$ thin film exhibited the structural stability having amorphous nature without the interfacial reaction between $Al_2O_3$ and Si. The post-annealing at $400^{\circ}C$ for 5 min led to an increase in the relative effective lifetime of $Al_2O_3$ thin film. This could be associated with the field effective passivation combined with surface passivation of textured Si. The capacitance-voltage (C-V) characteristics of the metal-oxide-semiconductor (MOS) with $Al_2O_3$ thin film post-annealed at $400^{\circ}C$ for 5 min was carried out to evaluate the negative fixed charge of $Al_2O_3$ thin film. From the relationship between flatband voltage ($V_{FB}$) and equivalent oxide thickness (EOT), which were extracted from C-V characteristics, the negative fixed charge of $Al_2O_3$ thin film was calculated to be $2.5{\times}10^{12}cm^{-2}$, of which value was applicable to the passivation layer of n-type crystalline Si solar cells.

Analysis of Process Parameters on Cell Capacitances of Memory Devices (메모리 소자의 셀 커패시턴스에 미치는 공정 파라미터 해석)

  • Chung, Yeun-Gun;Kang, Seong-Jun;Joung, Yang-Hee
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.5
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    • pp.791-796
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    • 2017
  • In this study, we investigated the influence of the fabrication process of stacked capacitors on the cell capacitance by using Load Lock (L/L) LPCVD system for dielectric thin film of DRAM capacitor. As a result, it was confirmed that the capacitance difference of about 3-4 fF is obtained by reducing the effective thickness of the oxide film by about $6{\AA}$ compared to the conventional non-L/L device. In addition, Cs was found to be about 3-6 fF lower than the calculated value, even though the measurement range of the thickness of the nitride film as an insulating film was in a normal management range. This is because the node poly FI CD is managed at the upper limit of the spec, resulting in a decrease in cell surface area, which indicates a Cs reduction of about 2fF. Therefore, it is necessary to control the thickness of insulating film and CD management within 10% of the spec center value in order to secure stable Cs.