• Title/Summary/Keyword: edge memory

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The theory of non-Markovian optical gain in excited semiconductors

  • Ahn, Doyeol
    • Proceedings of the Optical Society of Korea Conference
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    • 1995.06a
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    • pp.138-148
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    • 1995
  • A reduced description of the dynamics of carriers in excited semiconductors is presented. Fristly, a time-convolutionless equation of motion for the reduced density operator is derved from the microscopic Liouville wquation operator method. Secondly, the quantum kinetic equations for intercting electron-hole parirs near band-edge in semiconductors under an extermal optical field are obtained from the equation of motion for the reduced density operator. The non-Markovian optical gain of a driven semiconductor is derived including the many-body effects. plasma screening and excitinic effects are taken into account using as effective Hamiltonian in the time-dependent Hartree-Fock approximation. it is shown that the line shape of optical-gain spectra gain is enhanced by the exicitonic effects caused by the attrative electron-hole Coulomb interaction and the interference effects (renormalized memory effects) between the extermal driving filed and the intermal driving Filed and the stochastic reservoir of the system.

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A Study On Bar-Code Signal Processing System (바-코드 신호처리 시스템에 관한 연구)

  • Ihm, J.T.;Eun, J.J.;Park, H.K.
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.61-63
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    • 1987
  • In this paper, we develope a system which can perform signal processing for bar-code laser scanner. This system is composed of optical detector and preprocessor. The former detects the diffused light and converts it into TTL lebel output. The latter discriminator valid data from various raw data and transmits data to micro-processor. The preprocessor consists of edge transition detector, latch signal generator, module counter, register array, adder array, and buffer memory control circuit etc..

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3-D Nonlinear Magnetostatic Analysis by using FEM (FEM을 이용한 3-D 비선형 정자계 모델의 해석)

  • Kang, Byung-Kill;Ryu, Jae-Seop;Koh, Chang-Seop
    • Proceedings of the KIEE Conference
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    • 2000.11b
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    • pp.324-326
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    • 2000
  • A 3D magnetostatic field is analyzed considering the non-linear characteristics of the material using finite element method. In the finite element formulation, the edge element is adopted since it reduces the required computer memory and the computing time. The modified Newton-Raphson method is also used for non-linear analysis. A numerical example with the TEAM workshop problem 13 is analyzed, and the results are proved to concide well with measured ones.

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Video Saliency Detection Using Bi-directional LSTM

  • Chi, Yang;Li, Jinjiang
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.14 no.6
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    • pp.2444-2463
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    • 2020
  • Significant detection of video can more rationally allocate computing resources and reduce the amount of computation to improve accuracy. Deep learning can extract the edge features of the image, providing technical support for video saliency. This paper proposes a new detection method. We combine the Convolutional Neural Network (CNN) and the Deep Bidirectional LSTM Network (DB-LSTM) to learn the spatio-temporal features by exploring the object motion information and object motion information to generate video. A continuous frame of significant images. We also analyzed the sample database and found that human attention and significant conversion are time-dependent, so we also considered the significance detection of video cross-frame. Finally, experiments show that our method is superior to other advanced methods.

Task Scheduling in Fog Computing - Classification, Review, Challenges and Future Directions

  • Alsadie, Deafallah
    • International Journal of Computer Science & Network Security
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    • v.22 no.4
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    • pp.89-100
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    • 2022
  • With the advancement in the Internet of things Technology (IoT) cloud computing, billions of physical devices have been interconnected for sharing and collecting data in different applications. Despite many advancements, some latency - specific application in the real world is not feasible due to existing constraints of IoT devices and distance between cloud and IoT devices. In order to address issues of latency sensitive applications, fog computing has been developed that involves the availability of computing and storage resources at the edge of the network near the IoT devices. However, fog computing suffers from many limitations such as heterogeneity, storage capabilities, processing capability, memory limitations etc. Therefore, it requires an adequate task scheduling method for utilizing computing resources optimally at the fog layer. This work presents a comprehensive review of different task scheduling methods in fog computing. It analyses different task scheduling methods developed for a fog computing environment in multiple dimensions and compares them to highlight the advantages and disadvantages of methods. Finally, it presents promising research directions for fellow researchers in the fog computing environment.

Technical Trends in On-device Small Language Model Technology Development (온디바이스 소형언어모델 기술개발 동향)

  • G. Kim;K. Yoon;R. Kim;J. H. Ryu;S. C. Kim
    • Electronics and Telecommunications Trends
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    • v.39 no.4
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    • pp.82-92
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    • 2024
  • This paper introduces the technological development trends in on-device SLMs (Small Language Models). Large Language Models (LLMs) based on the transformer model have gained global attention with the emergence of ChatGPT, providing detailed and sophisticated responses across various knowledge domains, thereby increasing their impact across society. While major global tech companies are continuously announcing new LLMs or enhancing their capabilities, the development of SLMs, which are lightweight versions of LLMs, is intensely progressing. SLMs have the advantage of being able to run as on-device AI on smartphones or edge devices with limited memory and computing resources, enabling their application in various fields from a commercialization perspective. This paper examines the technical features for developing SLMs, lightweight technologies, semiconductor technology development trends for on-device AI, and potential applications across various industries.

Mesh Simplification for Preservation of Characteristic Features using Surface Orientation (표면의 방향정보를 고려한 메쉬의 특성정보의 보존)

  • 고명철;최윤철
    • Journal of Korea Multimedia Society
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    • v.5 no.4
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    • pp.458-467
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    • 2002
  • There has been proposed many simplification algorithms for effectively decreasing large-volumed polygonal surface data. These algorithms apply their own cost function for collapse to one of fundamental simplification unit, such as vertex, edge and triangle, and minimize the simplification error occurred in each simplification steps. Most of cost functions adopted in existing works use the error estimation method based on distance optimization. Unfortunately, it is hard to define the local characteristics of surface data using distance factor alone, which is basically scalar component. Therefore, the algorithms cannot preserve the characteristic features in surface areas with high curvature and, consequently, loss the detailed shape of original mesh in high simplification ratio. In this paper, we consider the vector component, such as surface orientation, as one of factors for cost function. The surface orientation is independent upon scalar component, distance value. This means that we can reconsider whether or not to preserve them as the amount of vector component, although they are elements with low scalar values. In addition, we develop a simplification algorithm based on half-edge collapse manner, which use the proposed cost function as the criterion for removing elements. In half-edge collapse, using one of endpoints in the edge represents a new vertex after collapse operation. The approach is memory efficient and effectively applicable to the rendering system requiring real-time transmission of large-volumed surface data.

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Super Resolution Algorithm Based on Edge Map Interpolation and Improved Fast Back Projection Method in Mobile Devices (모바일 환경을 위해 에지맵 보간과 개선된 고속 Back Projection 기법을 이용한 Super Resolution 알고리즘)

  • Lee, Doo-Hee;Park, Dae-Hyun;Kim, Yoon
    • KIPS Transactions on Software and Data Engineering
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    • v.1 no.2
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    • pp.103-108
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    • 2012
  • Recently, as the prevalence of high-performance mobile devices and the application of the multimedia content are expanded, Super Resolution (SR) technique which reconstructs low resolution images to high resolution images is becoming important. And in the mobile devices, the development of the SR algorithm considering the operation quantity or memory is required because of using the restricted resources. In this paper, we propose a new single frame fast SR technique suitable for mobile devices. In order to prevent color distortion, we change RGB color domain to HSV color domain and process the brightness information V (Value) considering the characteristics of human visual perception. First, the low resolution image is enlarged by the improved fast back projection considering the noise elimination. And at the same time, the reliable edge map is extracted by using the LoG (Laplacian of Gaussian) filtering. Finally, the high definition picture is reconstructed by using the edge information and the improved back projection result. The proposed technique removes effectually the unnatural artefact which is generated during the super resolution restoration, and the edge information which can be lost is amended and emphasized. The experimental results indicate that the proposed algorithm provides better performance than conventional back projection and interpolation methods.

Optimized Hardware Design of Deblocking Filter for H.264/AVC (H.264/AVC를 위한 디블록킹 필터의 최적화된 하드웨어 설계)

  • Jung, Youn-Jin;Ryoo, Kwang-Ki
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.1
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    • pp.20-27
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    • 2010
  • This paper describes a design of 5-stage pipelined de-blocking filter with power reduction scheme and proposes a efficient memory architecture and filter order for high performance H.264/AVC Decoder. Generally the de-blocking filter removes block boundary artifacts and enhances image quality. Nevertheless filter has a few disadvantage that it requires a number of memory access and iterated operations because of filter operation for 4 time to one edge. So this paper proposes a optimized filter ordering and efficient hardware architecture for the reduction of memory access and total filter cycles. In proposed filter parallel processing is available because of structured 5-stage pipeline consisted of memory read, threshold decider, pre-calculation, filter operation and write back. Also it can reduce power consumption because it uses a clock gating scheme which disable unnecessary clock switching. Besides total number of filtering cycle is decreased by new filter order. The proposed filter is designed with Verilog-HDL and functionally verified with the whole H.264/AVC decoder using the Modelsim 6.2g simulator. Input vectors are QCIF images generated by JM9.4 standard encoder software. As a result of experiment, it shows that the filter can make about 20% total filter cycles reduction and it requires small transposition buffer size.

A 3-D Vision Sensor Implementation on Multiple DSPs TMS320C31 (다중 TMS320C31 DSP를 사용한 3-D 비젼센서 Implementation)

  • Oksenhendler, V.;Bensrhair, Abdelaziz;Miche, Pierre;Lee, Sang-Goog
    • Journal of Sensor Science and Technology
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    • v.7 no.2
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    • pp.124-130
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    • 1998
  • High-speed 3D vision systems are essential for autonomous robot or vehicle control applications. In our study, a stereo vision process has been developed. It consists of three steps : extraction of edges in right and left images, matching corresponding edges and calculation of the 3D map. This process is implemented in a VME 150/40 Imaging Technology vision system. It is a modular system composed by a display, an acquisition, a four Mbytes image frame memory, and three computational cards. Programmable accelerator computational modules are running at 40 MHz and are based on TMS320C31 DSP with a $64{\times}32$ bit instruction cache and two $1024{\times}32$ bit internal RAMs. Each is equipped with 512 Kbytes static RAM, 4 Mbytes image memory, 1 Mbytes flash EEPROM and a serial port. Data transfers and communications between modules are provided by three 8 bit global video bus, and three local configurable pipeline 8 bit video bus. The VME bus is dedicated to system management. Tasks between DSPs are distributed as follows: two DSPs are used to edges detection, one for the right image and the other for the left one. The last processor computes the matching process and the 3D calculation. With $512{\times}512$ pixels images, this sensor generates dense 3D maps at a rate of about 1 Hz depending of the scene complexity. Results can surely be improved by using a special suited multiprocessors cards.

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