• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• 제15권3호
• /
• pp.233-237
• /
• 2002

A giga-bit DRAM(dynamic random access memory) technology with W/WNx/poly-Si dual gate electrode is presented in 7his papers. We fabricated $0.16\mu\textrm{m}$ CMOS using this technology and succeeded in suppressing short-channel effects. The saturation current of nMOS and surface-channel pMOS(SC-pMOS) with a $0.16\mu\textrm{m}$ gate was observed 330 $\mu\A/\mu\textrm{m}$ and 100 $\mu\A/\mu\textrm{m}$ respectively. The lower salutation current of SC-pMOS is due to the p-doped poly gate depletion. SC-pMOS shows good DIBL(dram-induced harrier lowering) and sub-threshold characteristics, and there was no boron penetration.

• Applied Microscopy
• /
• 제39권4호
• /
• pp.349-354
• /
• 2009

In this paper we have constructed three dimensional images and examined structural failure on thin film transistor (TFT) liquid crystal display (LCD) by using dual-beam focused ion beam (FIB) and IMOD software. Specimen was sectioned with dual-beam focused ion beam. Series of two dimensional images were obtained by scanning electron microscopy. Three dimensional reconstruction was constructed from them by using IMOD software. The short defect between Gate layer and Data layer was found from the result of three dimensional reconstruction. That phenomena made the function of the gate lost and data signal supplied to the electrode though the Drain continuously. That signal made continuous line defect. The result of the three dimensional reconstruction, serial section, SEM imaging by using the FIB will be the foundation of the next advanced study.

• Journal of IKEEE
• /
• 제21권1호
• /
• pp.1-6
• /
• 2017

IGBT (Insulated Gate Bipolar Transistor) device is a device with excellent current conducting capability, it is widely used as a switching device power supplies, converters, solar inverter, household appliances or the like, designed to handle the large power. This research was proposed 1200 class dual gate IGBT for electrical vehicle. To compare the electrical characteristics, The planar gate IGBT and trench gate IGBT was designd with same design and process parameters. And we carried to compare electrical characteristics about three devices. As a result of analyzing electrical characteristics, The on state voltage drop charateristics of dual gate IGBT was superior to those of planar IGBT and trench IGBT. Therefore, Aspect to Energy Loss, dual gate IGBT was efficiency. The breakdown volgate and threshold voltage of planar, trench and dual gate IGBT were 1460V and 4V.

• Journal of Electrical Engineering and Technology
• /
• 제8권6호
• /
• pp.1481-1486
• /
• 2013

In this paper, a new two dimensional (2D) analytical model of a Dual Material Gate tunnel field effect transistor (DMG TFET) is presented. The parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions. The simple and accurate analytical expressions for surface potential and electric field are derived. The electric field distribution can be used to calculate the tunneling generation rate and numerically extract tunneling current. The results show a significant improvement of on-current and reduction in short channel effects. Effectiveness of the proposed method has been confirmed by comparing the analytical results with the TCAD simulation results.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
• /
• pp.1301-1304
• /
• 2008

In this study, we used a multiple phase scheme for the clock in the dual-pull-down driver for TFT display panels. In this scheme, the turn-on time for the transistors in the dual-pull-down structure was reduced from 1/2 to 1/4 or 1/8 of the period cycle time. While keeping proper operation of the transistor size of circuit was fine tuned to achieve an optimal performance. The relation between the active time and the transistor dimensions was obtained for the optimal design.

• Proceedings of the Korean Vacuum Society Conference
• /
• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
• /
• pp.239-239
• /
• 2013

For more than four decades, ion-sensitive field-effect transistor (ISFET) sensors that respond to the change of surface potential on a membrane have been intensively investigated in the chemical, environmental, and biological spheres, because of their potential, in particular their compatibility with CMOS manufacturing technology. Here, we demonstrate a new type of ISFET with dual-gate (DG) structure fabricated on ultra-thin body (UTB), which highly boosts sensitivity, as well as enhancing chemical stability. The classic ion-sensitive field-effect transistor (ISFET) has been confronted with chronic problems; the Nernstian response, and detection limit with in the Debye length. The super-coupling effects imposed on the ultra thin film serve to not only maximize sensitivity of the DG ISFET, but also to strongly suppress its leakage currents, leading to a better chemical stability. This geometry will allow the ISFET based biosensor platform to continue enhancement into the next decade.

• Journal of the Institute of Electronics and Information Engineers
• /
• 제51권3호
• /
• pp.177-184
• /
• 2014

In chemical vapor deposition(CVD) tungsten silicide(WSix) dual poly gate(DPG) scheme, we observed the fluorine effects on gate oxide using the electrical and physical measurements. It is found that in fluorine-rich WSix NMOS transistors, the gate thickness decreases as gate length is reduced, and it intensifies the roll-off properties of transistor. This is because the fluorine diffuses laterally from WSix to the gate sidewall oxide in addition to its vertical diffusion to the gate oxide during gate re-oxidation process. When the channel length is very small, the gate oxide thickness is further reduced due to a relative increase of the lateral diffusion than the vertical diffusion. In PMOS transistors, it is observed that boron of background dopoing in $p^+$ poly retards fluorine diffusion into the gate oxide. Thus, it is suppressed the fluorine effects on gate oxide thickness with the channel length dependency.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• 제49권2호
• /
• pp.113-115
• /
• 2000

The gradual hole injection LIGBT (GI-LIGBT) which employs the dual gate and the p+ injector, was fabricated for eliminating a negative resistance regime and reducing a forward voltage drop in SA-LIGBT. The elimination of the negative resistance regime is successfully achieved by initiating the hole injection gradually. Furthermore, the experimental results show that the forward voltage drop of GI-LIGBT decreases by lV at the current density of 200 $A/cm^2$, when compared with that of the conventional SA-LIGBT. It is also found that the improvement in the on-state characteristics can be obtained without sacrificing the inherent fast switching characteristics of SA-LIGBT.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• 제56권9호
• /
• pp.1614-1618
• /
• 2007

We have demonstrated the experimental results to obtain the immunity of FN (Fowler Nordheim) stress for S-RCAT (Spherical-Recess Cell Array Transistor) which has been employed to meet the requirements of data retention time and propagation delay time for sub-100-nm mobile DRAM (Dynamic Random Access Memory). Despite of the same S-RCAT structure, the immunity of FN stress of S-RCAT depends on the process condition of gate oxidation. The S-RCAT using DPN (decoupled plasma nitridation) process showed the different degradation of device properties after FN stress. This paper gives the mechanism of FN-stress degradation of S-RCAT and introduces the improved process to suppress the FN-stress degradation of mobile DRAM.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제17권2호
• /
• pp.223-229
• /
• 2017

This paper analyzes the effect of a dual-metal-gate structure on the electrical characteristics of AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors. These structures have two gate metals of different work function values (${\Phi}$), with the metal of higher ${\Phi}$ in the source-side gate, and the metal of lower ${\Phi}$ in the drain-side gate. As a result of the different ${\Phi}$ values of the gate metals in this structure, both the electric field and electron velocity in the channel become better distributed. For this reason, the transconductance, current collapse phenomenon, breakdown voltage, and radio frequency characteristics are improved. In this work, the devices were designed and analyzed using a 2D technology computer-aided design simulation tool.