• 제목/요약/키워드: driver stage

검색결과 182건 처리시간 0.026초

NMOSFET으로 구성된 AC PDP 스캔 구동 집적회로의 동작 (Operation of NMOSFET-only Scan Driver IC for AC PDP)

  • 김석일;정주영
    • 대한전자공학회논문지SD
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    • 제40권7호
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    • pp.474-480
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    • 2003
  • We designed and tested a new scan driver output stage. Compared to conventional CMOS structured scan driver IC′s, the new NMOSFET-only scan driver circuit can reduce the chip area and therefore, the chip cost considerably. We confirmed the circuit operation with open drain power NMOSFET IC′s by driving 2"PDP test panel. We defined critical device parameters and their optimization methods lot the best circuit performance.

교통정보가 운전자의 운행행태에 미치는 영향 분석 - 자가운전자를 중심으로 - (Analysis of Driver's Travel Behavior by Traffic Imformation)

  • 임채문;구경남
    • 한국산업융합학회 논문집
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    • 제5권3호
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    • pp.239-246
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    • 2002
  • The propose of this study is to analysis driver's behavior of traveler information. This research made an attempt to explore driver's route change behavior in the en-route stage. Model were developed for each analysis with LIMDEP software which was developed by Willams H Greene. Commuters' transportation change in before trip stage are affected by their income, travel time, and incident information and constant of this model showed their reluctance of change mode. This was resulted from the inappropriateness of traffic information to general commuters which is the main target of traffic information.

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A SiGe HBT Variable Gain Driver Amplifier for 5-GHz Applications

  • 채규성;김창우
    • 한국통신학회논문지
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    • 제31권3A호
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    • pp.356-359
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    • 2006
  • A monolithic SiGe HBT variable gain driver amplifier(VGDA) with high dB-linear gain control and high linearity has been developed as a driver amplifier with ground-shielded microstrip lines for 5-GHz transmitters. The VGDA consists of three blocks such as the cascode gain-control stage, fixed-gain output stage, and voltage control block. The circuit elements were optimized by using the Agilent Technologies' ADSs. The VGDA was implemented in STMicroelectronics' 0.35${\mu}m$ Si-BiCMOS process. The VGDA exhibits a dynamic gain control range of 34 dB with the control voltage range from 0 to 2.3 V in 5.15-5.35 GHz band. At 5.15 GHz, maximum gain and attenuation are 10.5 dB and -23.6 dB, respectively. The amplifier also produces a 1-dB gain-compression output power of -3 dBm and output third-order intercept point of 7.5 dBm. Input/output voltage standing wave ratios of the VGDA keep low and constant despite change in the gain-control voltage.

A Dual-Output Integrated LLC Resonant Controller and LED Driver IC with PLL-Based Automatic Duty Control

  • Kim, HongJin;Kim, SoYoung;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • 제12권6호
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    • pp.886-894
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    • 2012
  • This paper presents a secondary-side, dual-mode feedback LLC resonant controller IC with dynamic PWM dimming for LED backlight units. In order to reduce the cost, master and slave outputs can be generated simultaneously with a single LLC resonant core based on dual-mode feedback topologies. Pulse Frequency Modulation (PFM) and Pulse Width Modulation (PWM) schemes are used for the master stage and slave stage, respectively. In order to guarantee the correct dual feedback operation, Phased-Locked Loop (PLL)-based automatic duty control circuit is proposed in this paper. The chip is fabricated using $0.35{\mu}m$ Bipolar-CMOS-DMOS (BCD) technology, and the die size is $2.5mm{\times}2.5mm$. The frequency of the gate driver (GDA/GDB) in the clock generator ranges from 50 to 425 kHz. The current consumption of the LLC resonant controller IC is 40 mA for a 100 kHz operation frequency using a 15 V supply. The duty ratio of the slave stage can be controlled from 40% to 60% independent of the frequency of the master stage.

A MOSFET's Driver Applied to High-frequency Switching with Wide Range of Duty Cycles

  • Zhang, Zhao;Xie, Shaojun
    • Journal of Power Electronics
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    • 제15권5호
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    • pp.1402-1408
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    • 2015
  • A MOSFET's gate driver based on magnetic coupling is investigated. The gate driver can meet the demands in applications for wide range of duty cycles and high frequency. Fully galvanic isolation can be realized, and no auxiliary supply is needed. The driver is insensitive to the leakage inductor of the isolated transformer. No gate resistor is needed to damp the oscillation, and thus the peak output current of the gate driver can be improved. Design of the driving transformer can also be made more flexible, which helps to improve the isolation voltage between the power stage and the control electronics, and aids to enhance the electromagnetic compatibility. The driver's operation principle is analyzed, and the design method for its key parameters is presented. The performance analysis is validated via experiment. The disadvantages of the traditional magnetic coupling and optical coupling have been conquered through the investigated circuit.

효율 개선을 위해 캐스코드 구동 증폭단을 활용한 바이패스 구조의 2.4-GHz CMOS 전력 증폭기 (A 2.4-GHz CMOS Power Amplifier with a Bypass Structure Using Cascode Driver Stage to Improve Efficiency)

  • 장요셉;유진호;이미림;박창근
    • 한국정보통신학회논문지
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    • 제23권8호
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    • pp.966-974
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    • 2019
  • 본 연구에서는 저전력 영역에서의 효율을 개선하기 위해 바이패스 구조를 갖춘 2.4GHz CMOS 전력 증폭기를 제안한다. 바이패스 구조를 설계하기 위해, 구동 증폭단의 공통 게이트 트랜지스터를 두 개로 분할하였다. 공통 게이트 트랜지스터 중 하나는 고출력 전력 모드를 위한 전력단을 구동하도록 설계된다. 다른 공통 게이트 트랜지스터는 저출력 전력 모드를 위해 전력단을 바이 패스하도록 설계하였다. 측정 된 최대 출력은 20.35 dBm이며 효율은 12.10 %이다. 11.52 dBm의 측정 된 출력에서 효율은 전력증폭단을 바이 패스함으로써 1.90 %에서 7.00 %로 향상됨을 확인하였다. 측정 결과를 바탕으로 제안 된 바이 패스 구조의 타당성을 성공적으로 검증 하였다.

ACT-R 인지 아키텍처를 이용한 운전자의 인지 부하 측정 (Prediction of Driver's Cognitive Workload using Cognitive Architecture : ACT-R)

  • 임수용;명노해;홍기범
    • 산업공학
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    • 제25권2호
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    • pp.187-195
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    • 2012
  • The driver model based on the ACT-R cognitive architecture was developed in order to predict the performance and cognitive workload of a driver operating HVI devices. In the 10 HVI tasks, the predicted performance time and cognitive workload by the ACT-R driver model was well matched and highly correlated with the mean of performance times and subjective workload ratings from 15 participants, respectively. It is strongly proposed that the ACT-R driver model in this study can be applied to evaluate the usability of a new HVI design with less cost in the early stage of system development.

지게차 구조진동 특성분석을 통한 운전자승차감 개선기법 연구 (Study on Riding Quality Improvement of a Forklift Truck through Structural Vibration Analysis)

  • 나덕주;김재환;최석배;김낙인
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 2004년도 추계학술대회논문집
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    • pp.542-545
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    • 2004
  • The vibration reduction process for the driver comfort of a forklift truck is studied in this study since the related driver comfort is a primary design target in the vehicle design recently. However, the underlying study for a vibration analysis regarding to the driver comfort is still an element stage. Thus, a preceding large work has to be needed to apply the CAE technology for the detail vehicle design, and it prevents the vehicle optimal design. To reduce the proceeding large works, the evaluated process and required data are comply with the accumulated trouble shooting experiences in this study. Since the driver comfort is a human related problem, the human vibration index associated with analysis vibration result is additionally introduced as a driver comfort judgement value.

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Unusual Motion Detection for Vision-Based Driver Assistance

  • Fu, Li-Hua;Wu, Wei-Dong;Zhang, Yu;Klette, Reinhard
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • 제15권1호
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    • pp.27-34
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    • 2015
  • For a vision-based driver assistance system, unusual motion detection is one of the important means of preventing accidents. In this paper, we propose a real-time unusual-motion-detection model, which contains two stages: salient region detection and unusual motion detection. In the salient-region-detection stage, we present an improved temporal attention model. In the unusual-motion-detection stage, three kinds of factors, the speed, the motion direction, and the distance, are extracted for detecting unusual motion. A series of experimental results demonstrates the proposed method and shows the feasibility of the proposed model.

Ku-Band Power Amplifier MMIC Chipset with On-Chip Active Gate Bias Circuit

  • Noh, Youn-Sub;Chang, Dong-Pil;Yom, In-Bok
    • ETRI Journal
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    • 제31권3호
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    • pp.247-253
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    • 2009
  • We propose a Ku-band driver and high-power amplifier monolithic microwave integrated circuits (MMICs) employing a compensating gate bias circuit using a commercial 0.5 ${\mu}m$ GaAs pHEMT technology. The integrated gate bias circuit provides compensation for the threshold voltage and temperature variations as well as independence of the supply voltage variations. A fabricated two-stage Ku-band driver amplifier MMIC exhibits a typical output power of 30.5 dBm and power-added efficiency (PAE) of 37% over a 13.5 GHz to 15.0 GHz frequency band, while a fabricated three-stage Ku-band high-power amplifier MMIC exhibits a maximum saturated output power of 39.25 dBm (8.4 W) and PAE of 22.7% at 14.5 GHz.

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