• Title/Summary/Keyword: drain noise

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An Experimental Study on the Noise Reduction for Toilet Stool Plumbings in Apartment Bathroom (공동주택 욕실의 변기 배수소음 저감에 관한 실험적 연구)

  • Baek, Eun-Sun
    • KIEAE Journal
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    • v.7 no.2
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    • pp.57-62
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    • 2007
  • Recently Among indoor noises plumbing noise from supply and drain water pipe is being pointed out as a annoying noise following to floor impact noise, and it is increasing the rate to point the noise due to the following several reasons: water pressure, vibration by fabricated structures and direct noise propagation from upper floor through ceiling This study aims to analyse the characteristics of toilet stool plumbing noise in apartment bathroom which are generated by crossing plumbings and elbows. And it analyse the effect of noise reduction by soundproofing and insulations which are covered at crossing plumbings. And also analyse the characteristics of noise about a type of elbows, crossing plumbing and result of dB(A). At last it provide a fundamental data for the purpose of reduction of plumbing noise in apartment.

Noise Analysis of Sub Quarter Micrometer AlGaN/GaN Microwave Power HEMT

  • Tyagi, Rajesh K.;Ahlawat, Anil;Pandey, Manoj;Pandey, Sujata
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.3
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    • pp.125-135
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    • 2009
  • An analytical 2-dimensional model to explain the small signal and noise properties of an AlGaN/GaN modulation doped field effect transistor has been developed. The model is based on the solution of two-dimensional Poisson's equation. The developed model explains the influence of Noise in ohmic region (Johnson noise or Thermal noise) as well as in saturated region (spontaneous generation of dipole layers in the saturated region). Small signal parameters are obtained and are used to calculate the different noise parameters. All the results have been compared with the experimental data and show an excellent agreement and the validity of our model.

Noise Modeling of Gate Leakage Current in Nanoscale MOSFETs (나노 MOSFETs의 게이트 누설 전류 노이즈 모델링)

  • Lee, Jonghwan
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.3
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    • pp.73-76
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    • 2020
  • The physics-based compact gate leakage current noise models in nanoscale MOSFETs are developed in such a way that the models incorporate important physical effects and are suitable for circuit simulators, including QM (quantum-mechanical) effects. An emphasis on the trap-related parameters of noise models is laid to make the models adaptable to the variations in different process technologies and to make its parameters easily extractable from measured data. With the help of an accurate and generally applicable compact noise models, the compact noise models are successfully implemented into BSIM (Berkeley Short-channel IGFET Model) format. It is shown that the noise models have good agreement with measurements over the frequency, gate-source and drain-source bias ranges.

Balanced Buck-Boost Switching Converter to Reduce Common-Mode Conducted Noise

  • Shoyama Masahito;Ohba Masashi;Ninomiya Tamotsu
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.212-216
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    • 2001
  • Because conventional switching converters have been usually using unbalanced circuit topologies, parasitic capacitance between the drain/collector of an active switch and the frame ground through its heat sink may generate the common-mode conducted noise. We have proposed a balanced switching converter circuit, which is an effective way to reduce the common-mode conducted noise. As an example, a boost converter version of the balanced switching converter was presented and the mechanism of the common-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switching converter circuit and presents a buck-boost converter version of the balanced switching converter. The feature of common-mode noise reduction is confirmed by experimental results and the mechanism of the common-mode noise reduction is explained using equivalent circuits.

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A Study on the Actual Survey and Reduction of Plumbing Noise in Apartment Houses (공동주택 급배수 설비소음의 실태 및 저감방안에 관한 연구)

  • Kim, Heung-Sik;Ji, Yong-Kyoun;Yoon, Se-Cheol
    • The Journal of the Acoustical Society of Korea
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    • v.9 no.4
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    • pp.45-54
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    • 1990
  • As the results of actual survey of indoor noise in apartment houses, it represents that plumbing noise and floor impact noise are most unsatisfactory factors to inhabitants. In this paper, the actual condition of plumbing noise in apartment houses was measured and the methods of plumbing noise reduction are suggested. For these suggestions, the actual survey of plumbing noise and the model test on structure-borne sound of water supply pipe and drain sound were carried out.

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The Design of Low Noise Downconverter for K-band Satellite Multipoint Distribution Service (K-band SMDS용 저잡음 하향변환기의 설계)

  • 정인기;이영철;김천석
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.6
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    • pp.1143-1150
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    • 2001
  • In this paper, we designed a downconverter for K-band satellite multipoint distribution service(SMDS). The designed downconverter consists of a low noise amplifiers, bandpass filter, stable local oscillator, drain mixer and If Amplifiers. Low noise amplifiers show 28㏈ gain and 1.5㏈ noise figure in the frequency range of 19.2㎓~20.2㎓, and a band pass filter has a -l㏈ insertion loss, and 18.25㎓ Stable local oscillator which is dielectric resonant oscillation, We obtained that the output power of the 18.25㎓ oscillation frequency is 0.5㏈m and the phase noise is the -84.67㏈c at 10KHz offset frequency. With the input RF signal the 19.2㎓~20.2㎓, conversion gain of the drain mixer shows 5㏈ at the Intermediate frequency range of 950MHz~1950MHz. We have proved that the designed downconverter satisfied the specification of a K-band satellite multipoint distribution service and it can be applied to the satellite internet receiver.

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Case History of Low Vibration and Low Noise Granular Pile Method in the Area of Incurred the Popular Enmity (민원발생지역에서의 저진동$\cdot$저소음 Granular Pile의 시공사례)

  • Chun, Byung-Sik;Kim, Baek-Young
    • Proceedings of the KSR Conference
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    • 2003.10b
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    • pp.176-181
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    • 2003
  • Damages by vibration and noise due to the construction performance are increasing. The rise of construction demand and enlargement of equipments are major reasons of this damage. As a result, the enmity of the people is provoked and this appears to be an obstacle of construction work. Especially, in case of ground improvement construction. Casing pipe is inserted into the Sand Drain, Sand Compaction Pile and Vibrated Crushed-stone Pile by vibration power when carrying out. Hence, a pillar is formed and it creates vibration and noise. This causes a lot of restrictions to construction condition. The low Vibration and low noise construction equipments uses earth auger and hydrulic cylinder for insertion and chopping operation instead of vibro hammer, which is the source of vibration and noise. This minimize ground disturbanceand decrease vibration and noise successfully, but increase chopping effect greatly. Thus, this new equipment is not only suitable for environment but also excellent engineering method of construction.

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Optimization and Characterization of Gate Electrode Dependent Flicker Noise in Silicon Nanowire Transistors

  • Anandan, P.;Mohankumar, N.
    • Journal of Electrical Engineering and Technology
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    • v.9 no.4
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    • pp.1343-1348
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    • 2014
  • The low frequency noise in Silicon Nanowire Field Effect Transistors is analyzed by characterizing the gate electrode dependence on various geometrical parameters. It shows that gate electrodes have a strong impact in the flicker noise of Silicon Nanowire Field effect transistors. Optimization of gate electrode was done by comparing different performance metrics such a DIBL, SS, $I_{on}/I_{off}$ and fringing capacitance using TCAD simulations. Molybdenum based gate electrode showed significant improvement in terms of high drive current, Low DIBL and high $I_{on}/I_{off}$. The noise power sepctral density is reduced by characterizing the device at higher frequencies. Silicon Nanowire with Si3N4 spacer decreases the drain current spectral density which interms reduces the fringing fields there by decreasing the flicker noise.

A Study on the Reduction Method of Heavy-weight floor impact sound and Plumbing noise in Decrepit Apartment houses (노후 아파트의 바닥충격음 및 급·배수 소음 저감방안에 관한 연구)

  • Joo, Moon Ki;Han, Myung Ho;Oh, Yang Ki
    • KIEAE Journal
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    • v.9 no.2
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    • pp.99-106
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    • 2009
  • The noise in apartment buildings are major factor that determine the quality of indoor noise environment. Particularly, the noise from children's running footsteps and plumbing noise have caused the residents who live in decrepit apartment houses to uncomfortable environment. And as time go by, sound performance are getting worse according to the aging of the facilities. So this study deals with the plans to improve the sound performance of decrepit apartment house. To compare the noise reduction, we measured the heavy-weight impact sound level and plumbing noise level before and after changes the measurement conditions. As the results of measurements, the heavy-weight impact sound level were decreased when stiffness reinforcement were installed on slab. Especially the sound level were decreased 2.1-7.6dB in 50-80Hz of low frequency range. Instead of PVC pipe system, cast iron pipe and triple elbow drain pipe systems were installed. Noise level were decreased 15dB(A) in 250Hz. Noise level of pipe system's on the slab is less than under slab one. On the contrary water saving stool showed increasing the noise level.

A 15 nm Ultra-thin Body SOI CMOS Device with Double Raised Source/Drain for 90 nm Analog Applications

  • Park, Chang-Hyun;Oh, Myung-Hwan;Kang, Hee-Sung;Kang, Ho-Kyu
    • ETRI Journal
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    • v.26 no.6
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    • pp.575-582
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    • 2004
  • Fully-depleted silicon-on-insulator (FD-SOI) devices with a 15 nm SOI layer thickness and 60 nm gate lengths for analog applications have been investigated. The Si selective epitaxial growth (SEG) process was well optimized. Both the single- raised (SR) and double-raised (DR) source/drain (S/D) processes have been studied to reduce parasitic series resistance and improve device performance. For the DR S/D process, the saturation currents of both NMOS and PMOS are improved by 8 and 18%, respectively, compared with the SR S/D process. The self-heating effect is evaluated for both body contact and body floating SOI devices. The body contact transistor shows a reduced self-heating ratio, compared with the body floating transistor. The static noise margin of an SOI device with a $1.1\;{\mu}m^2$ 6T-SRAM cell is 190 mV, and the ring oscillator speed is improved by 25 % compared with bulk devices. The DR S/D process shows a higher open loop voltage gain than the SR S/D process. A 15 nm ultra-thin body (UTB) SOI device with a DR S/D process shows the same level of noise characteristics at both the body contact and body floating transistors. Also, we observed that noise characteristics of a 15 nm UTB SOI device are comparable to those of bulk Si devices.

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