• 한국정보보호학회:학술대회논문집
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• 한국정보보호학회 1995년도 종합학술발표회논문집
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• pp.331-337
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• 1995

In this paper, We present that protocols have already proposed an applicable key distribution and authentication protocol based discrete logarithm and prime-factorization problem in PCN(Personal Communication Network) is anaysised. We newly propose identiity-based protocol using smart card. This proposed potocol is that Fiat-Shamir identification scheme and a new key distribution scheme based on Fiat-Shamir identification scheme are joined. Proposed protocol is compared with suiting protocols with respect to security and efficiency to evalate performance, so its calculation is reduced in key distribution and authentication to evaluate performance.

• ETRI Journal
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• 제6권1호
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• pp.3-9
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• 1984

This paper presents a direct adaptive poleplacement control scheme which is applicable to discrete-time non-minimum phase systems. It is proved that by this scheme the poles can be placed at the desired locations and the overall state vector of the system is uniformly bounded if the reference input is sufficiently rich, and also proved that in case of insufficiently rich reference input the overall system can still be stabilized though the poles may not be placed exactly at the desired locations. The effectiveness of this scheme is verified by digital computer simulations.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제10권9호
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• pp.4467-4486
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• 2016

Discrete cosine transform (DCT) based JPEG standard significantly improves the coding efficiency of image compression, but it is unacceptable event in serious blocking artifacts at low bit rate and low efficiency of high-definition image. In the light of all phase digital filtering theory, this paper proposes a novel transform based on discrete sine transform (DST), which is called all phase discrete sine biorthogonal transform (APDSBT). Applying APDSBT to JPEG scheme, the blocking artifacts are reduced significantly. The reconstructed image of APDSBT-JPEG is better than that of DCT-JPEG in terms of objective quality and subjective effect. For improving the efficiency of JPEG coding, the structure of JPEG is analyzed. We analyze key factors in design and evaluation of JPEG compression on the massive parallel graphics processing units (GPUs) using the compute unified device architecture (CUDA) programming model. Experimental results show that the maximum speedup ratio of parallel algorithm of APDSBT-JPEG can reach more than 100 times with a very low version GPU. Some new parallel strategies are illustrated in this paper for improving the performance of parallel algorithm. With the optimal strategy, the efficiency can be improved over 10%.

• 한국통신학회논문지
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• 제40권9호
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• pp.1731-1733
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• 2015

뇌파는 비선형적이고 비정상적인 특징을 가지므로 주파수 분석법보다는 시간-주파수 분석법을 적용하는 것이 효과적이다. 본 논문은 기존에 제안했던 EIV 기법과 다층신경망을 이용한 뇌파기반 졸음 감지 시스템에 시간-주파수 분석 방법인 이산 웨이블릿 변환을 적용한 졸음 감지 시스템을 제안한다. 또한 운전자의 상태를 기존의 '각성', '천이', '졸음'의 세 가지 상태에 '기타'를 추가하여 네 가지 상태로 분류율을 측정하였으며, 기계 학습을 수행하여 제안한 시스템이 특정 조건에서 우수한 성능을 가짐을 확인하였다.

• Journal of Power Electronics
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• 제18권4호
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• pp.1075-1085
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• 2018

To deal with the operation performance degradation of permanent magnet synchronous machine (PMSM) drives with uncertainties and unmodeled dynamics, this paper presents a finite-time nonlinear disturbance observer (FTNDO) based discretized integral sliding mode (DISM) composite control scheme. Based on the reaching-law approach, a DISM speed controller featuring a superior dynamic quality and global robustness against disturbances is constructed. This controller can avoid the reaching phase and overlarge control action. In addition, a sliding mode differentiator based FTNDO is devised and extended to the discrete-time domain for disturbance estimation. The attractive features of the FTNDO are that it can provide a finite-time converging estimation and alleviate the chattering effect in conventional sliding mode observers, while retaining robustness to parameter variations. By feeding the estimate forward to the pre-stage DISM controller, both disturbances and chattering can be significantly suppressed. Moreover, considering the estimation error of a FTNDO caused by discrete sampling, a stability analysis of the composite controller is discussed. Experimental results validate the superiority of the presented scheme.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제16권1호
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• pp.287-304
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• 2022

With the development of quantum computers, ring signature schemes based on large integer prime factorization, discrete logarithm problem, and bilinear pairing are under threat. For this reason, we design a ring signature scheme based on lattice with a fixed verification key. Compared with the previous ring signature scheme based on lattice, our design has a fixed verification key and does not disclose the signer's identity. Meanwhile, we propose an anonymous electronic voting scheme by using our ring signature scheme based on lattice and (t, n) threshold scheme, which makes up for the lack of current anonymous electronic voting that cannot resist attacks of the quantum computer. Finally, under standard model (SM), we prove that our ring signature scheme based on lattice is anonymous against the full-key exposure, and existentially non-forgeable against insider corruption. Furthermore, we also briefly analyze the security of our anonymous electronic voting scheme.

• 대한수학회지
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• 제44권6호
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• pp.1397-1415
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• 2007

We consider an inverse heat conduction problem(IHCP) in a quarter plane which appears in some applied subjects. We want to determine the heat flux on the surface of a body from a measured temperature history at a fixed location inside the body. This is a severely ill-posed problem in the sense that arbitrarily "small" differences in the input temperature data may lead to arbitrarily "large" differences in the surface flux. A semi-discrete central difference scheme in time is employed to deal with the ill posed problem. We obtain some error estimates which also give the information about how to choose the step length in time. Some numerical examples illustrate the effects of the proposed method.

• 한국시뮬레이션학회논문지
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• 제5권2호
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• pp.41-58
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• 1996

The Discrete Event Systems Specification(DEVS) formalism specifies a discrete event system in a hierarchical, modular form. This paper presents a distributed simulation environment D-DEVSim++ for models specified by the DEVS formalism. D-DEVSim++ employs a new simulation scheme which is a hybrid algorithm of the hierarchical simulation and Time Warp mechanisms. The scheme can utilize both the hierarchical scheduling parallelism and the inherent parallelism of DEVS models. This hierarchical scheduling parallelism is investigated through analysis. Performance of the proposed methodology is evaluated through benchmark simulation on a 5-dimensional hypercube parallel machine. The performance results indicate that the methodology can achieve significant speedup. Also, it is shown that the analyzed speedup for the hierarchical scheduling time corresponds the experiment.

• Transactions on Control, Automation and Systems Engineering
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• 제4권4호
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• pp.330-340
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• 2002

In this Paper. a non-linear approach to a design of model reference adaptive control is presented. The approach is demonstrated by a case study of a simple single-pole and no zero, linear, discrete-time plant. The essence of the idea is to generate a full non-linear model of the plant dynamics and the parameter adaptation dynamics as a gradient descent algorithm with respect to a Riemannian metric. It is shown how a Riemannian metric can be chosen so that the modelled plant dynamics do in fact match the true plant dynamics. The performance of the proposed scheme is compared to a traditional model reference adaptive control scheme using the classical sensitivity derivatives (Euclidean gradients) for the descent algorithm.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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• pp.2315-2318
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• 2003

The Wavelet Transform has been applied in mathematics and computer sciences. Numerous studies have proven its advantages in image processing and data compression, and have made it a basic encoding technique in data compression standards like JPEG2000 and MPEG-4. Software implementations of the Discrete Wavelet Transform (DWT) appears to be the performance bottleneck in real-time systems in terms of performance. And hardware implementations are not flexible. Therefore, FPGA implementations of the DWT has been a topic of recent research. The goal of this thesis is to investigate of FPGA implementations of the DWT Processor for image compression applications. The DWT processor design is based on the Lifting Based Wavelet Transform Scheme, which is a fast implementation of the DWT The design uses various techniques. The DWT Processor was simulated and implemented in a FLEX FPGA platform of Altera