• 한국초전도학회:학술대회논문집
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• 2007.07a
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• pp.22-23
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• 2007

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.1 s.92
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• pp.78-83
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• 2005

LTCC filters have been widely used to wireless terminals. They generally adopt the multilayer structure. Some of multilayer LTCC filters are made of symmetrical parallel-coupled lines and anti-symmetrical parallel-coupled lines to reduce the length of resonators. The equivalent circuit of parallel-coupled lines was analyzed and applied to bandpass filters using multilayer parallel-coupled line resonators. The three-pole bandpass filter with the center frequency of 2.45 GHz is designed by using the proposed equivalent circuit and the measured results have good agreement with the design results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.9
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• pp.15-22
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• 2013

A new LED lamp driving technology with a charge pump instead of a conventional DC-DC converter is proposed. The proposed driving technology is used to control the LED lamp with digital dimming. The power loss in the zener diodes is reduced because the charging process of the capacitors is selectively controlled according to the digital control signal. From the experimental results, when dimming four LED lamps simultaneously, the average driving circuit efficiency of 89% is obtained, regardless of the dimming level. White light with color temperature over a range of 2800~7200K was produced by dimming control of red, green, blue and amber LED lamps with the proposed driving circuit. The characteristics of the driving circuits can be changed depending on the characteristics of the R, G, B, and A LED lamps. The efficiency of the driving circuits up to a maximum 89% can also be obtained depending on the combination of LED lamps. The driving technology with digital dimming control for LED lamps proposed in this paper would be effective for obtaining high efficiency in LED driving circuits and remote control of LED lamps using digital communications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.59-64
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• 2008

In this paper, we developed an virtual lecture to study digital logic circuits. The contents is intended fer the students without or with little knowledge about electrics or electronics. For the beginners, the lecture contains the basic electronics and basic circuit theory as well as the degital logic circuits to be more practical lecture. And we developed the virtual circuit lab which uses real-like devices, circuits and interactive objects for the students to experience practical digital circuits. With the features described above, this contents would be useful for the beginners who want to studying digital logic circuits.

• Journal of IKEEE
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• v.18 no.2
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• pp.228-233
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• 2014

In this paper, we propose a CMOS-memristor hybrid circuit that can perform 4-bit multiplication for future energy-efficient computing in nano-scale digital systems. The proposed CMOS-memristor hybrid circuit is based on the parallel architecture with AND and OR planes. This parallel architecture can be very useful in improving the power-delay product of the proposed circuit compared to the conventional CMOS array multiplier. Particularly, from the SPECTRE simulation of the proposed hybrid circuit with 0.13-mm CMOS devices and memristors, this proposed multiplier is estimated to have better power-delay product by 48% compared to the conventional CMOS array multiplier. In addition to this improvement in energy efficiency, this 4-bit multiplier circuit can occupy smaller area than the conventional array multiplier, because each cross-point memristor can be made only as small as $4F^2$.

• International Journal of Precision Engineering and Manufacturing
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• v.1 no.1
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• pp.49-55
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• 2000

The semiconductor industry relies on digital optical imaging for the overlay metrology of integrated circuit patterns. One critical performance demand in the particular application of digital imaging is placed on the edge resolution that is defined as the smallest detectable displacement of an edge from its image acquired in digital from. As the critical feature size of integrated circuit patterns reaches below 0.35 micrometers, the edge resolution is required to be less than 0.01 micrometers. This requirement is so stringent that fundamental behaviors of digital optical imaging need to be explored especially for the precision coordinate metrology. Our investigation reveals that the edge resolution shows quasi-random characteristics, not being simply deduced from relevant opto-electronic system parameters. Hence, a stochastic upper bound analysis is made to come up with the worst edge resolution that can statistically well predict actual indeterminate edge resolutions obtained with high magnification microscope objectives.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.618-621
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• 1999

With the advent of the high-speed microprocessor and DSP, the possibility of executing a control strategy in digital domain has become a reality. By the use of the DSP and microprocessor controller, many high power drive system may be enhanced resulting in the improved robustness to EMI, the ability to communicate the operating conditions and the ease of adjusting the control parameters. But, the digital controller using DSP or microprocessor is not applied in the high frequency switching power supplies, especially full bridge DC/DC converter. So, this paper presents the method and realization of designing a digital-to-phase shift PWM circuit for full digital controlled full bridge DC/DC converter with zero voltage switching. The operating principles, simulation and experimental results will be presented.

• Journal of information and communication convergence engineering
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• v.14 no.4
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• pp.268-271
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• 2016

An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for $0.13-{\mu}m$ CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.522-523
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• 2017

Analog-to-Digital converter is designed using a current conveyor circuit and a time-to-digital converter. The analog voltage is sampled using the current conveyor circuit and then the voltage is converted to time information by the discharge of the sampling voltage. The time information is converted to digital value by the counter-type time-to-digital converter. In order to reduce the converted error the clock is synchronized with the time information pulse.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.4
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• pp.301-308
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• 1991

In this paper, we have proposed a demodulation circuit of radio data receiver system and calculated the error probability of the digital transmitted signal corrupted under noise environment. And we have evaluated the error performance of the proposed system. The designed demodulation circuits have been implemented by using the general random logic and PLL circuits, which can be possible for the integrated circuit design of the radio data receiver system. In addition calculation of bit error rate in recovered digital signal has been accomplished ans we have confirmed that the proposed system hsa the equivalent performance with already existing ones.