• Journal of Broadcast Engineering
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• v.11 no.4 s.33
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• pp.521-532
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• 2006

Recently, many research initiatives have been underway to improve reception performance of ATSC based DTV signal in mobile channel by adopting multiple antennas. In this paper, we propose a new mobile channel model which can be applicable to any array geometry. And then we propose new channel estimation algorithm which uses PN5l1 sequence in field synch. The proposed algorithm is to estimate channel by correlating the input signal in If frequency band and finding maximum peak, which does not need complicated synchronization circuit. Finally, we propose new receiver structures which can be implemented at the front-end of the existing receiver with no modification. With computer simulation, we verify the performance of the proposed model and verify the performance of the receiver structure with computer simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.8 s.350
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• pp.19-26
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• 2006

In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit 100MSPS at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. Further, the number of folding blocks (NFB) is decreased by half of them compared to the conventional ones. A moebius-band averaging technique is adopted at the proposed ADC to improve performance. With the clock speed of 100MSPS, the ADC achieves an effective resolution bandwidth (ERBW) of 50MHz, while consuming only 4.5mW of power. The measured result of figure-of-merit (FoM) is 0.93pJ/convstep. The INL and DNL are within ${\pm}0.5 LSB$, respectively. The active chip occupies an area of $0.28mm^2$ in 0.18um CMOS technology.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.9
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• pp.19-27
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• 1998

The Transmitter part of single RF transceiver chip for an extended GSM handset application was circuit-designed, fabricated adn evaluated. The RF-IC Chip was processed by 0.8${\mu}m$ Si BiCMOS, 80 pin TQFP of $10 {\times} 10mm$ size, 3.3V operated RF-IC reveals, in general, quite reasonable integrity and RF performances. This paper describes development resuts of RF transmitter section, which includes IF/RF up-conversion mixer, IF/RF polyphase and pre-amplifier. The test results show that RF transmitter section is well operated within frequency range of 880~915MHz, which is defined on the extended GSM(E-GSM) specification. The transmitter section also reveals moderate power consumption of 71mA and total output power of 8.2dBm.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.10 s.352
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• pp.27-34
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• 2006

This paper has implemented a very small($1.4{\times}2.8[Cm^2]$) 13.56[MHz] RFID reader ensuring machine ID recognition correctly in a noise space of Tag-to-Reader within 3Cm. For operation of the RFID system, at first, this paper has designed the loop antenna of a reader and the fading model of back-scattering on microwave propagation following to 13.56[MHz] RFID Air Interface ISO/IEC specification. Secondly, this paper has proposed the automatically path selected RF switching circuit and the firmware operation relationship by measuring and analyzing the very small RFID RF issues. Finally, as a very small reader main body, this paper has shown the DSP board and software functions made for extraction of $1{\sim}2$ machine ID information and error prevention simultaneously with carrying of 13.56[MHz] RFID signals that the international standard specification ISO/IEC 18000-3 defined.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.1
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• pp.175-181
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• 2015

In this paper, we develop a 2.4GHz ISM band wireless communication platform prototype based on embedded linux which support can be u-Hospital service. The developed system is available connecting between ARM920T processor board and FPGA board and linking IEEE 802.11b PHY board, AD/DA(10Bit) and RF(2.4GHz) board for wireless access. It is also can be utilized for the embedded system design with IEEE 802.11b/g Access Point(Option: IEEE 802.11a/b/g) test due to the Embedded Linux. Also, the developed system is possible to test and verify the radio access technology, Modem(OFDM etc) and IP(Intellectual Property) circuit. And make the most use of the system, we search for a expansion to that home and mobile healthcare, wellness service application.

• The Journal of the Convergence on Culture Technology
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• v.3 no.3
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• pp.27-30
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• 2017

IoT could be applied to various areas because of the important role of sensor. The existing sensor communication method is to quickly transmit data by using clock and two data pins based on the I2C serial communication method. As the objects used are gradually light-weighted and the amount of data transmission is decreased, the simplification of hardware is more emphasized as an essential design element than the speed of transmission. This paper designed a circuit to send/receive data in series, and also realized arduino, by analyzing the existing communication method and then using a single pin for light-weight. The single pin serial communication could reduce power consumption, which is suitable for the sensor area using digital communication of IoT area.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.12
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• pp.1337-1344
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• 2014

The objective of an echo canceller connected to any end of a communication line such as digital subscriber line (DSL) is to compensate the outgoing transmit signal in the receiving path that the hybrid circuit leaks. The echo canceller working in a full duplex environment is an adaptive system driven by the local signal. Conventional echo canceller that implement the least mean square (LMS) algorithm provides a low computational burden but poor convergence properties. The length of the echo canceller will directly affect both the degree of performance and the convergence speed of the adaptation process. To cancel long time-varying echoes, the number of tap coefficients of a conventional echo canceller must be large, which decreases the convergence speed of the adaptive filter. This paper proposes an alternative technique for the echo cancellation in a telecommunication channel. The new technique employs the bi-directional least mean square (LMS) algorithm for adaptively computing the optimal set of the coefficients of the echo canceller, which is composed of weighted combination of both feedforward and feedback algorithms. Finally, Simulation results as well as mathematical analysis demonstrates that the proposed echo canceller has faster convergence speed than the conventional LMS echo canceller with nearly equivalent complexity of computation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.11
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• pp.2479-2485
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• 2013

In this paper, we present a design for solid-state radar SSPA with sequential bias. We apply to variable extension pulse generator to eliminate signal distortion which is caused by bias rising/falling delay of power amplifier. There is an optimum impedance matching circuit to have high efficiency of GaN-power device by measuring microwave characteristics through load-pull method. The designed SSPA is consisted of pre-amplifier, drive-amplifier and main-amplifier as a three stages to apply for X-Band solid-state radar. Thereby we made a 200W SSPA which has output pulse maximum power shows 53.67dBm and its average power is 52.85dBm. The optimum design of transceiver module for solid-state pulse compression radar which is presented in this dissertation, it can be available to miniaturize and to improve the radar performances through additional research for digital radar from now on.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.94-99
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• 2010

This paper presents a design procedure of digitally controlled oscillator(DCO) for power optimization. By controlling coarse tuning bits and fine tuning bits of DCO, the proposed design procedure can optimize the power dissipation and does not affect the LSB resolution, frequency range, linearity, portability. For optimization, the relationship between control bits and power dissipation of the DCO was analyzed. The DCO circuits using and unusing proposed design technique have been designed, simulated and proved using 0.13um, 1.2V CMOS library. The DCO circuit with proposed design technique has operation range between 283MHz and 1.1GHz and has 1.7ps LSB resolution and consumes 2.789mW at frequency of 1GHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.261-268
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• 2014

This paper presents a electrocardiogram(ECG), electromyogram(EMG), and Photoplethysmography(PPG) signal wireless monitoring system based on Bluetooth Low Energy (BLE). ECG and EMG sensor interface analog front-end circuits are designed by using off-the-shelf parts. Texas Instruments(TI)'s CC2540DK is used for BLE-based communication. Two CC2540DK modules are used as Peripheral and Central nodes. In peripheral device, vital signals are acquired by the analog front-ends and fed to ADC for analog-to-digital conversion. The peripheral transmitts the data through the air to the central device. The central device receive the data and sends them to PC using UART. GUI is designed using Labview for displaying the acquired vital signals. The developed system can be used for future ubiquitous wireless healthcare system based on bluetooth 4.0.