• Journal of KIISE:Computer Systems and Theory
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• v.30 no.12
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• pp.749-755
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• 2003

Digital signal processing hardware based in RNS is currently considered as an important method for high speed and low cost hardware realization. This research designs and implements the method for conversion from a specific residue number system with moduli of the from $(2^k-1, 2^k, 2^k+1)$ to a weighted number system. Then, it simulates the implementation using a overlapped multiple-bit scanning method in the process of CRT conversion. In conclusion, the simulation shows that the CRT method which is adopted in this research, performs arithmetic operations faster than the traditional approaches, due to advantages of parallel processing and carry-free arithmetic operation.

• Current Optics and Photonics
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• v.1 no.2
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• pp.90-94
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• 2017

Visible light identification (VLID) is a user identification system for a door lock application using smartphone that adopts visible light communication (VLC) technology with the objective of high security, small form factor, and cost effectiveness. The user is verified by the identification application program of a smartphone via fingerprint recognition or password entry. If the authentication succeeds, the corresponding encoded visible light signals are transmitted by a light emitting diode (LED) camera flash. Then, only a small size and low cost photodiode as an outdoor interface converts the light signal to the digital data along with a comparator, and runs the authentication process, and releases the lock. VLID can utilize powerful state-of-the-art hardware and software of smartphones. Furthermore, the door lock system is allowed to be easily upgraded with advanced technologies without its modification and replacement. It can be upgraded by just update the software of smartphone application or replacing the smartphone with the latest one. Additionally, wireless connection between a smartphone and a smart home hub is established automatically via Bluetooth for updating the password and controlling the home devices. In this paper, we demonstrate a prototype VLID door lock system that is built up with LEGO blocks, a photodiode, a comparator circuit, Bluetooth module, and FPGA board.

• Journal of Korean Society for Geospatial Information Science
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• v.16 no.3
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• pp.71-78
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• 2008

Nowadays, echosouder has been widely used in sea survey and ship navigation. By utilizing echosounder, we can measure the depth of water reliability. However, the problem is that depth update rate drops remarkably when sea bottom is shallow or steep/rugged. Therefore, we have developed an optimized algorithm to process tranducer's soundwave signals at high-speed and minimize error. Processing algorithm is implemented by the latest DSP processor (TMS320F2812), consequently, high-speed data processing can be achieved. Performance of the proposed algorithm is verified by experiments and compared with existing algorithms. It has shown that our method results in higher precision in water depth measurement than other methods.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.22-28
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• 2009

This paper presents a fast received signal strength indicator (RSSI) circuit for wireless communication application. The proposed circuit is developed using power detectors and an analog-to-digital converter to achieve a fast settling time. The power detector is consisted of a novel logarithmic variable gain amplifier (VGA), a peak detector, and a comparator in a closed loop. The VGA achieved a wide logarithmic gain range in a closed loop form for stable operation. For the peak detector, a fast settling time and small ripple are obtained using the orthogonal characteristics of quadrature signals. In $0.18-{\mu}m$ CMOS process, the RSSI value settles down in $20{\mu}s$ with power consumption of 20 mW, and the maximum ripple of the RSSI is 30 mV. The proposed RSSI circuit is fabricated with a personal handy-phone system transceiver. The active area is $0.8{\times}0.2\;mm^2$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.238-246
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• 2011

A 3-5 GHz UWB radar chip in 0.13 ${\mu}m$ CMOS process is presented in this paper. The UWB radar transceiver for surveillance and biometric applications adopts the equivalent time sampling architecture and 4-channel time interleaved samplers to relax the impractical sampling frequency and enhance the overall scanning time. The RF front end (RFFE) includes the wideband LNA and 4-way RF power splitter, and the analog signal processing part consists of the high speed track & hold (T&H) / sample & hold (S&H) and integrator. The interleaved timing clocks are generated using a delay locked loop. The UWB transmitter employs the digitally synthesized topology. The measured NF of RFFE is 9.5 dB in 3-5 GHz. And DLL timing resolution is 50 ps. The measured spectrum of UWB transmitter shows the center frequency within 3-5 GHz satisfying the FCC spectrum mask. The power consumption of receiver and transmitter are 106.5 mW and 57 mW at 1.5 V supply, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.300-303
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• 2015

Digital imaging process has been put to practical use in various application sectors due to a rapid advancement such as memory devices, etc. However, noises are being generated due to various reasons during the image processing and a variety of methods are being studied in order to eliminate these noises. Generally, images are damaged due to a mixed noise having different characteristics. In this paper, a filter algorithm which switches according to the noise types was proposed in order to mitigate the influence of mixed noise included in the image. And using the PSNR as the standard for objective decision making of the improvement effect, it was compared with the existing methods.

• ETRI Journal
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• v.33 no.6
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• pp.897-903
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• 2011

A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.12
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• pp.117-126
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• 2005

In this paper, we present a new method for the reduction of the PAPR (peak to average power ratio) of OFDM signals. The idea behind the proposed method is that IFFT is implemented often with software for a digital signal processor such that we may avoid the repeated calculations to reduce the computational operations: we define sub-sequences in the IFFT process and then multiply the optimum phase rotation factors to them to minimize the PAPR. The PAPR reduction performance of the proposed method is equal to that of the interleaved partition scheme of the PTS (partial transmit sequence) method with only 1/3 computational operations of it.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.9
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• pp.531-538
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• 2005

This paper proposes an expert system which is able to enhance the accuracy and productivity by determining the test strategy based on heuristic rules for test of the hybrid electronic circuit board producted massively in production line. The test heuristic rules are obtained from test system designer, test experts and experimental results. The guarding method separating the tested device with circumference circuit of the device is adopted to enhance the accuracy of measurements in the test of analog devices. This guarding method can reduce the error occurring due to the voltage drop in both the signal input line and the measuring line by utilizing heuristic rules considering the device impedance and the parallel impedance. Also, PSA(Parallel Signature Analysis) technique Is applied for test of the digital devices and circuits. In the PSA technique, the real-time test of the high integrated device is possible by minimizing the test time forcing n bit output stream from the tested device to LFSR continuously. It is implemented in Visual C++ computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. Finally, the effectiveness of the builded expert system is proved by simulating the several faults occurring in the mounting process the electronic devices to the surface of PCB for a typical hybrid electronic board and by identifying the results.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.11 no.2
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• pp.110-118
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• 1997

This paper describes the dissipation factor measuring techniques of insulating oil on operating pole transformers by using digital signal processor. After applying voltage to the condenser which is in¬stalled in a transformer, acquiring source voltage and current of condenser and using cross-correla¬tion techniques, we can check the dissipation factor of insulating oil. To improve measuring accuracy and the speed of process, we use hardware such as TMS320C31 DSP board and software such as cross -correlation techniques. We simulated the measuring accuracy and the degree of the noise effect of this new measuring techniques by using computer simulation, and compared the simplified measuring devices with Schering bridge on degraded insulating oil. The result showed that this measuring tech¬nique can be used as diagnostic method on the pole transformers.