• Korean Journal of Computational Design and Engineering
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• v.17 no.4
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• pp.262-273
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• 2012

We present a novel GPU algorithm to compute outer cell boundaries of 3D arrangement subdivided by a given set of triangles. An outer cell boundary is defined as a 2-manifold surface consisting of subdivided polygons facing outward. Many geometric problems, such as Minkowski sum, sweep volume, lower/upper envelop, Bool operations, can be reduced to finding outer cell boundaries with specific properties. Computing outer cell boundaries, however, is a very time-consuming job and also is susceptible to numerical errors. To address these problems, we develop an algorithm based on GPU with a robust scheme combining interval arithmetic and multi-level precisions. The proposed algorithm is tested on Minkowski sum of several polygonal models, and shows 5-20 times speedup over an existing algorithm running on CPU.

• Proceedings of the KIEE Conference
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• 2004.07d
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• pp.2574-2576
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• 2004

본 논문에서 디지털 영상의 인증과 무결성을 확인하는 새로운 워터마킹 기법을 제안하였다. 컨텐츠에 대한 인증과 무결성을 체크하는 방법 중, 암호학적 해쉬함수(MD5)를 이용한 Wong의 방법이 인증과 무결성을 위한 워터마크 방법으로는 가장 적합하다. 특히 이 방법은 암호학적인 해쉬함수를 사용하므로 워터마킹 알고리즘의 안정성이 암호학적 해쉬함수의 안정성에 의존하게 되므로 안전하다. 해쉬 값을 계산하려면 법(modulus), 보수 (complement), 시프트 (shift), XOR (bitwise exclusive-or) 등 연산이 필요하다. 그러나 본 논문에서는 곱셈 연산만 필요로 한 산술부호화기법 (Arithmetic coding)을 이용하였다. 이 기법은 입력되는 심벌 (symbol)들의 확률구간을 계속적으로 곱하여 결과적으로 얻어지는 누적확률구간을 출력한다. 본 논문에서 키(key) 값에 의하여 심벌들의 확률구간을 결정하고, 그리고 키 값에 의하여 심벌들의 입력순서론 재배치함으로써 결과적으로 얻어지는 누적확률 값은 키 값에 의존하게 하였다. 실험을 통하여 본 알고리즘이 무결성을 입증할 수 있고, PSNR은 51.13dB 이상으로서 아주 좋으며, 위변조를 판단하는데 소요되는 시간은 해쉬함수 (MD5)를 사용하는데 걸리는 시간이 1/3배이다. 그러므로 실시간으로 사용 가능하다.

• Journal of the Korean Society of Industry Convergence
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• v.17 no.3
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• pp.184-193
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• 2014

Machine vision systems is applied for various industries such as optimize your spending, automate your production and maximize your efficiency. This research is effective for most optimal light condition of machine vision that technology was applied bald outside human visual acuity. Image processing converts a target image captured by a CCD camera into a digital signal and then performs various arithmetic operations on the signal to extract the characteristics of the target, such as points, lines, circles, area and length. The mathematical concepts of convolution and the kernel matrix are used to apply filters to signals, to perform functions such as extracting edges and reducing unwanted noise. This research analyze and compares matching ratio with reference image and search for optimal lighting condition in accuracy that user wants coming input image according to brightness change of lighting.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.02a
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• pp.92-94
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• 2003

In superconductive digital logic circuits, D2 cells can be used to compose a decoder an important component of an Arithmetic Logic Unit (ALU). In this wor, we simulated D2 cell by using WRspice. D2 cell has one input, one switch input, and two outputs (output1 and output2). D2 cell functions in such way that output1 follows the input and output2 is the complement of the input data, when the switch input is "0, ". However, when there is a switch input "1, " the opposite output signals are generated. In this paper, we optimized a D2 cell by using WRspice, and obtained the minimum margin of 26%. Our optimized D2 cell will play a key role in the ALU fabrication.the ALU fabrication.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.521-524
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• 1988

This paper describes BSDL(Behavioral/Structural Description Language), CDTF(Control Data Text File) and state synthesizer built for use in ICSC(InCheon Silicon Compiler). BSDL describes structral and behaviral specifications of an ASIC(Application Specific IC) for digital system design. ICSC's paser generates CDTF consists of if-then-else, arithmetic and data transfer statement according to each BSDL statement. State synthesizer generates CCG(Control Constraint Graph) in consideration of execution of statement and generates VCG (Variable Constraint Graph) in consideration use of variable generation and use of variable. Also, it involves allocating algorithm operation nodes in the data path and the control path to machine states with minimum state number and as small area as possible.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.452-456
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• 2010

Multiplication is a fundamental arithmetic operation in many digital signal processing (DSP) and communication algorithms. The group CSD (GCSD) multiplier was recently proposed based on the variation of canonical signed digit (CSD) encoding and partial product sharing. This multiplier provides an efficient design when the multiplications are performed only with a few predetermined coefficients (e.g., FFT). In this paper, it is shown that, by exploiting the characteristics of the filter coefficients, GCSD multipliers can be used for the efficient implementation of time-multiplexed FIR filters.

• Proceedings of the KIEE Conference
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• 1995.07b
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• pp.471-475
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• 1995

This paper deals with the aliasing problem minimized by using an analog low-pass prefilter have a sampling frequency of 18000 Hz is designed and describes to extract their fundamental frequency components by AFT filter. And them distance relaying algorithm based AFT filter is computational simple, good frequency response and fast convergence in calculation of system apparant impedance. We performed off-line simulation using data from EMTP.

• Journal of Korea Multimedia Society
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• v.7 no.5
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• pp.658-667
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• 2004

For digital image compression, various fractal image coding schemes using the self-similarity of image have been studied extensively. This paper discusses the problem that occurs during the calculating process of adaptive orthogonal transformation and provides improvements of LIFS coding scheme using the transformation. This proposed scheme has a better performance than JPEG for a wide range of compression ratio. This research also proposes an image composition method consisting of all domains of the transformation. The results show that the arithmetic operation processes of the encoder and the decoder become much smaller even without the distortion of the coding performance.

• Current Optics and Photonics
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• v.2 no.5
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• pp.400-406
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• 2018

The Semiconductor Optical Amplifier (SOA)-based Mach-Zehnder interferometer is a major contributor in all-optical digital processing and optical computation. Optical tree architecture provides one of the new, alternative schemes for integrated all-optical arithmetic and logical operations. In this paper, we propose an all-optical 3-bit integrated parity generator and checker using SOA-MZI-based optical tree architecture. The proposed scheme, able to process input signals at a desired operating wavelength, has been characterized using RZ-modulated signals at 10 Gbps. The maximum extinction ratios achieved at the output of the parity generator and checker are 10 dB and 8 dB respectively.

• Journal of Korea Society of Industrial Information Systems
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• v.22 no.4
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• pp.1-9
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• 2017

In this Paper, Double Encryption Technology Based on Phase-Shifting Digital Holography and Digital Watermarking is Proposed. For the Purpose, we First Set a Logo Image to be used for Digital Watermark and Design a Binary Phase Computer Generated Hologram for this Logo Image using an Iterative Algorithm. And Random Generated Binary Phase Mask to be set as a Watermark and Key Image is Obtained through XOR Operation between Binary Phase CGH and Random Binary Phase Mask. Object Image is Phase Modulated to be a Constant Amplitude and Multiplied with Binary Phase Mask to Generate Object Wave. This Object Wave can be said to be a First Encrypted Image Having a Pattern Similar to the Noise Including the Watermark Information. Finally, we Interfere the First Encrypted Image with Reference Wave using 2-step PSDH and get a Good Visible Interference Pattern to be Called Second Encrypted Image. The Decryption Process is Proceeded with Fresnel Transform and Inverse Process of First Encryption Process After Appropriate Arithmetic Operation with Two Encrypted Images. The Proposed Encryption and Decryption Process is Confirmed through the Computer Simulations.