• ETRI Journal
• /
• v.29 no.4
• /
• pp.421-429
• /
• 2007

This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 $mm^2$ die using standard 0.18 ${\mu}m$ CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.10 no.7
• /
• pp.1526-1531
• /
• 2009

This paper describes the design of a 5th order Elliptic CMOS Gm-C low-voltage filter for the RFID reader IC. The designed filter is composed of CMOS differential transconductors by parallel gain circuits to improve the gain of the conventional self-biased differential amplifier. The filter is designed to operate in low-voltage 1.8V to meet the specification of the RFID reader filter. The results of HSPICE simulation using 1.8V-0.18${\mu}m$CMOS processing parameter showed that the designed 5th order Elliptic low-pass filter satisfied the cutoff frequency of 1.35MHz given by the design specification.

• ETRI Journal
• /
• v.42 no.6
• /
• pp.943-950
• /
• 2020

We propose 8.2-GHz band radar RFICs for an 8 × 8 phased-array frequency-modulated continuous-wave receiver developed using 65-nm CMOS technology. This receiver panel is constructed using a multichip solution comprising fabricated 2 × 2 low-noise amplifier phase-shifter (LNA-PS) chips and a 4ch RX front-end chip. The LNA-PS chip has a novel phase-shifter circuit for low-voltage operation, novel active single-to-differential/differential-to-single circuits, and a current-mode combiner to utilize a small area. The LNA-PS chip shows a power gain range of 5 dB to 20 dB per channel with gain control and a single-channel NF of 6.4 dB at maximum gain. The measured result of the chip shows 6-bit phase states with a 0.35° RMS phase error. The input P1 dB of the chip is approximately -27.5 dBm at high gain and is enough to cover the highest input power from the TX-to-RX leakage in the radar system. The gain range of the 4ch RX front-end chip is 9 dB to 30 dB per channel. The LNA-PS chip consumes 82 mA, and the 4ch RX front-end chip consumes 97 mA from a 1.2 V supply voltage. The chip sizes of the 2 × 2 LNA-PS and the 4ch RX front end are 2.39 mm × 1.3 mm and 2.42 mm × 1.62 mm, respectively.

• Journal of Korea Society of Industrial Information Systems
• /
• v.19 no.3
• /
• pp.1-7
• /
• 2014

This paper describes the implementation of high speed comparator for the ATE (automatic test equipment) system. The comparator block is composed of continuous comparator, differential difference amplifier(DDA) and output stage. For the wide input dynamic range of 0V to 5V, and for the high speed operation (1~800MHz), high speed rail-to-rail amplifier is used in the first stage. And hysteresis circuits, pre-amp and latch are followed for high speed operation. To measure the difference of output signals between the two devices under test (DUTs), a DDA is applied because it can detect the differences of both common signals and differential signals. This comparator chip was implemented with $0.18{\mu}m$ BCDMOS process and can compare the signal difference of 5mV up to the frequency range of 800 MHz. The chip area of the comparator is $620{\mu}m{\times}830{\mu}m$.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.2
• /
• pp.313-318
• /
• 2012

This paper presents an automatic system to detect variety of faults from fine pitch COF(chip-on-film) which is less than $30{\mu}m$. Developed system contains circuits and technique to detect fast various faults such as hard open, hard short, soft open and soft short from fine pattern. Basic principle for fault detection is to monitor fine differential voltage from pattern resistance differences between fault-free and faulty cases. The technique uses also radio frequency resonator arrays for easy detection to amplify fine differential voltage. We anticipate that proposed system is to be an alternative for conventional COF test systems since it can fast and accurately detect variety of faults from fine pattern COF test process.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.7 s.361
• /
• pp.24-30
• /
• 2007

Latching optical switches and optical logic gates with AND or OR, and the INVERT functionality are demonstrated, for the first time, by the monolithic integration of a differential typed vertical cavity laser with depleted optical thyristor (VCL-DOT) structure with a low threshold current of 0.65 mA, a high slope efficiency of 0.38 mW/mA, and high sensitivity to input optical light. Many kinds of logic functions (AND, OR, NAND, NOR, and INVERT) are experimentally demonstrated using a differential switching operation scheme changing the intensity of a reference input beam without any changes of electrical circuits.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.22 no.4
• /
• pp.10-16
• /
• 2021

This paper proposes a model that considers the parity-time symmetric structure as a state detection circuit for sensor applications using a stretchable inductor. In particular, to obtain a more practical computer simulation result, the stretchable inductor model was applied to this study model by referring to previously reported experimental results. The resistance component and phase component were controlled through the negative differential resistance circuit used in this study. In addition, the imbalance of the circuit caused by a change in the characteristics of the stretchable inductor could be compensated for using a negative differential resistance circuit. In particular, an analysis of the frequency characteristics of the sensor driving circuit of the parity-time symmetric structure proposed in this study confirmed that the Q-factor could be increased up to 20 times compared to the conventional resonant circuit.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.8 no.2
• /
• pp.107-115
• /
• 2015

In this paper, a small-area 32-bit differential paired eFuse OTP memory for power ICs is designed. In case of smaller number of rows than that of columns for the OTP memory cell array, a scheme for the cell array reducing the number of SL driver circuits requiring their larger layout areas by routing the SL (source line) lines supplying programming currents for eFuse links in the row direction instead of the column direction as well as a core circuit is proposed. In addition, to solve a failure of being blown for non-blown eFuse links by the electro-migration phenomenon, a regulated voltage of V2V ($=2V{\pm}0.2V$) is used to a RWL (read word line) driver circuit and a BL (bit line) pull-up driver circuit. The layout size of the designed 32-bit eFuse OTP memory is $228.525{\mu}m{\times}105.435{\mu}m$, which is confirmed to be 20.7% smaller than that of the counterpart using the conventional cell array routing, namely $197.485{\mu}m{\times}153.715{\mu}m$.

• Proceedings of the IEEK Conference
• /
• 2003.07c
• /
• pp.2733-2736
• /
• 2003

This paper proposes a dry-type active surface EMG electrode for the myoelectric prosthetic hand. The designed electrode is small size for embedding in the socket of prosthetic hand, and it has three leads including the reference of signal. To acquire EMG signal rejected the power noise, a precision differential amplifier and various filters such as the band pass filter band rejection filter, low pass and high pass filter are embedded on the electrode. The final output of the electrode is integrated absolute EMG (IEMG) obtained by full rectifier and moving average circuits. From experimental results using the implemented dry-type active surface EMG electrode, the proposed electrode is feasible for the myoelectric prosthetic hand.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.62 no.7
• /
• pp.937-942
• /
• 2013

Equivalent series impedance of high-voltage pulsed power capacitor is one of the important electrical characteristics both for users and for capacitor manufacturers because it may have serious effects on the performance of pulse forming circuits. In this paper, definition of equivalent series impedance and factors which generate equivalent series impedance are reviewed. Theoretical analysis for the calculation of equivalent series impedance based on differential measurement method is described and calculation program has been developed. In order to acquire data which are necessary to calculate equivalent series impedance from discharging current waveform, charging-dischargig controller has been manufactured. Measurement results of equivalent series impedance for high voltage pulsed power capacitor have been given.