• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.4 s.310
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• pp.53-59
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• 2006

This paper describes the new design technique of full wave rectifier (FWR) for precise measurement instrument and the chip implementation of this FWR circuit with measurement results. Conventional circuits have some problems of complex design and limited output range( $VDD/2{\sim}VLIIV1IT+$). Proposed FWR circuit was simply designed with two 2x1 MUXs, one high speed comparator, and one differential difference amplifier(DDA). One rail-to-rail differential difference amplifier(DDA) performs the DC level shifting to VSS and 2X amplification simultaneously, and enables the full range ($Vss{\sim}VDD$) operation. The proposed FWR circuits shows more than 50% reduction of chip area and power consumption compared to conventional one. Proposed circuit was implemented with 0.35um 1-poly 2-metal CMOS process. Core size is $150um{\times}450um$ and power dissipation is 840uW with 3.3V single supply.

• Journal of Digital Convergence
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• v.10 no.11
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• pp.371-376
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• 2012

In this paper, we propose a new data coding method and its circuits for minimizing data transition in text image. The proposed circuits can solve the synchronization problem between input data and output data in the modified LVDS algorithm. And the proposed algorithm is allowed to transmit two data signals through additional serial data coding method in order to minimize the data transition in text image and can reduce the operating frequency to a half. Thus, we can solve EMI(Electro-Magnetic Interface) problem and reduce the power consumption. The simulation results show that the proposed algorithm and circuits can provide an enhanced data transition minimization in text image and solve the synchronization problem between input data and output data.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.12
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• pp.91-99
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• 1994

We used CMOS current mirror and differenial amplifier to find out how the degradation of each devices in circuit affect total circuit performance. The devices in circuit wer degraded by hot-carrier generated during circuit operation and total circuit performance were changed according to the change of each device parameters. To examine the circuit performance phenomena of current mirror, we analyzed three diffent kinds of current mirrors and made correlation model between circuit performance and stressed device parameters, and compare hot-carrier immunity of these circuits. Also we analyzed how the performance of differential amplifier degraded from the initial value after hot-carrier stress incircuit operations.

• Smart Structures and Systems
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• v.17 no.2
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• pp.327-345
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• 2016

The existence of SH-wave in a piezomagnetic layer overlying an initially stressed orthotropic half-space is investigated. The coupled of differential equations are solved for piezomagnetic layer overlying an orthotropic elastic half-space. The general dispersion equation has been derived for both magnetically open circuit and magnetically closed circuits under the four types of boundary conditions. In the absence of the piezomagnetic properties, initial stress and orthotropic properties of the medium, the dispersion equations reduce to classical Love equation. The SH-wave velocity has been calculated numerically for both magnetically open circuit and closed circuits. The effect of initial stress and magnetic permeability are illustrated by graphs in both the cases. The velocity of SH-wave decreases with the increment of wave number.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.19-27
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• 2007

This paper presents power supply-insensitive Gbps low power LVDS I/O circuits. The proposed LVDS I/O has been designed and simulated using 1.8V, $0.18\;{\mu}m$ TSMC CMOS Process. The LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and an output stage with the switched capacitor common mode feedback(SC-CMFB). The differential phase splitter generates a pair of differential signals which provides a balanced duty $cycle(50{\pm}2%)$ and phase difference$(180{\pm}0.2^{\circ})$ over a wide supply voltage range. Also, $V_{OD}$ voltage is 250 mV which is the smallest value of the permissible $V_{OD}$ range for low power operation. The output buffer maintains the required $V_{CM}$ within the permissible range$(1.2{\pm}0.1V)$ due to the SC-CMFB. The receiver covers a wide input DC offset $range(0.2{\sim}2.6\;V)$ with 38 mV hysteresis and Produces a rail-to-rail output over a wide supply voltage range. Beside, the designed receiver has 38.9 dB gain at 1 GHz, which is higher than conventional receivers.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.759-762
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• 1998

In this paper, a SL-DCVSL (static latched differential cascode voltage switch logic) circuit for the asynchronous pipeline is proposed. The proposed SL-DCVSL circuit is a slightly modified version of the DCVSL circuit, and used to improve the storage capability of the precharged functional blocks. The proposed SL-DCVSL has more robust storage characteristics compared to the conventional LDCVSL (latched DCVSL〔2〕). The operation of the proposed circuit is verified by simulating the asynchronous FIFO (First-In First-Out) structure.

• 전기의세계
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• v.29 no.9
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• pp.599-603
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• 1980

Mathematically, the Electromagnetic phenomena can be represented by the Maxwell's equations, but it is very difficult to solve these equations, especially, having complex structural boundaries. By the way, the development of a computer system made us easy to solve these kind of partial differential equations. The Finite Element Method, one of the numerical methods, is very this. This paper shows the power of F.E.M. by examining, with an example of a hollow cylinder in a uniform magnetic field which is analytically solvable, the errors and the tendency of magnetic flux lines.

• Journal of Sensor Science and Technology
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• v.18 no.1
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• pp.95-101
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• 2009

A simple and new CMOS potentiostat circuit for amperometric sensor is described. To maintain a constant potential between the reference and working electrodes, only one differential difference amplifier (DDA) is needed in proposed design, while conventional potentiosatat requires at least 2 operational amplifiers and 2 resistors, or more than 3 operational amplifiers and 4 resistors for low voltage CMOS integrated potentiostat. The DDA with rail-to-rail design not only enables the full range operation to supply voltage but also provides simple potentiostat system with small hardwares and low power consumption.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1247-1250
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• 2006

A new liquid crystal display (LCD) Data identified Time Extension (DiTEX) driving scheme with a high charged voltage is proposed. The different charged voltage owing to the differential charging time and various initial pixel-potential can be eliminated or diminished under this method. It is compatible with a 2-row inversion and can be realized into the commercial dual-sided gate circuits.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.1163-1166
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• 1999

In this paper, A CMOS power amplifier for PCS is designed with 0.65-$\mu\textrm{m}$ CMOS technology. Differential cascode structure is used which has good reverse isolation and wide voltage swing. This amplifier circuits consist of three stages which are power amplification stage, driver stage and power control stage. We obtain output power of 30 ㏈m, IMD3 of -31㏈c and efficiency of 30 % at input power of 4 ㏈m.