• Journal of Sensor Science and Technology
• /
• v.17 no.1
• /
• pp.15-22
• /
• 2008

When designing image sensors including a CMOS vision chip for edge detection, resolution is a significant factor to evaluate the performance. It is hard to improve the resolution of a bio-inspired CMOS vision using a resistive network because the vision chip contains many circuits such as a resistive network and several signal processing circuits as well as photocircuits of general image sensors such as CMOS image sensor (CIS). Low resolution restricts the use of the application systems. In this paper, we improve the resolution through layout and circuit optimization. Furthermore, we have designed a printed circuit board using FPGA which controls the vision chip. The vision chip for edge detection has been designed and fabricated by using $0.35{\mu}m$ double-poly four-metal CMOS technology, and its output characteristics have been investigated.

• Smart Media Journal
• /
• v.11 no.11
• /
• pp.40-48
• /
• 2022

In this paper, an educational kit that can be used in AI education was developed to solve the difficulties of AI education. Through this, object detection and person detection in computer vision using CNN and OpenCV to learn practical-oriented experiences from theory-centered and user image recognition (Your Own) that learns and recognizes specific objects Image Recognition), user object classification (Segmentation) and segmentation (Classification Datasets), IoT hardware control that attacks the learned target, and Jetson Nano GPIO, an AI board, are developed and utilized to develop and utilize textbooks that help effective AI learning made it possible.

• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.8 no.6
• /
• pp.13-22
• /
• 2009

Recently, DSRC technology is used in the various fields such as parking system, BIS, ETC, etc. This paper suggests a traffic information system using this DSRC technology. The traffic information processing based on point detection using existing vehicle detection equipment is the system in which a collection and a service are operated separately while the traffic information system based on the link detection using DSRC is able to collect and provide the traffic information through the communication between RSE and OBU. The speed of a traffic congestion is high on the process converted from a point passing speed to a link average speed because the vehicle detection equipment makes the link traffic information into the point information. When the condition of traffic is deteriorated, traffic speed of the vehicle detection equipment becomes higher than DSRC. Especially, in this system, deflection by data of the traffic speed of the traffic information system is much decreased, and the unexpected condition detection and traffic condition are provided promptly.

• Journal of Broadcast Engineering
• /
• v.20 no.3
• /
• pp.421-429
• /
• 2015

This paper is about an approach for pedestrian detection and tracking with infrared imagery. We used the CUDA(Computer Unified Device Architecture) that is a parallel processing language in order to improve the speed of video-based pedestrian detection and tracking. The detection phase is performed by Adaboost algorithm based on Haar-like features. Adaboost classifier is trained with datasets generated from infrared images. After detecting the pedestrian with the Adaboost classifier, we proposed a particle filter tracking strategies on HSV histogram feature that exploit adaptively at the same time. The proposed approach is implemented on an NVIDIA Jetson TK1 developer board that is full-featured device ideal for software development within the Linux environment. In this paper, we presented the results of parallel processing with the NVIDIA GPU on the CUDA development environment for detection and tracking of pedestrians. We compared the object detection and tracking processing time for night-time images on both GPU and CPU. The result showed that the detection and tracking speed of the pedestrian with GPU is approximately 6 times faster than that for CPU.

• Proceedings of the IEEK Conference
• /
• 2001.06b
• /
• pp.9-12
• /
• 2001

In oriental medicine, it is possible to classify each person into eight kinds of constitutions based on the eight constitutional medicine theory. We developed a piezoelectric 3-channel tactile sensor using PVDF (polyvinylidene fluoride) film for pulse detection of the radial artery. High frequency buffer (impulse buffer), amplifier, 60 Hz noise notch filter and low pass filter were integrated on three sheets of PCB board. The pulses of the radial artery at three points were checked using our system. Each constitution of the eight ones has different combinations of pulses.

• Proceedings of the KSR Conference
• /
• 1998.11a
• /
• pp.595-600
• /
• 1998

Train wheels tend to wear abrasion due to frequent Starlings and brakings. They are important factors of train safety and noise. However, it is difficult and inaccurate to measure their shape and profile manually. Profile measurement system of train wheel with image processing is proposed. The system consists of CCD cameras, PCI image grabber board, and PC operated on Windows '95. Image processing algorithms such as filtering, histogram equalization, and edge detection are presented, and some processing results are illustrated.

• Journal of IKEEE
• /
• v.27 no.3
• /
• pp.345-349
• /
• 2023

In this paper, we propose a study on the development of deep learning structure for defective pixel detection of next-generation smart LED display board using imaging device. In this research, a technique utilizing imaging devices and deep learning is introduced to automatically detect defects in outdoor LED billboards. Through this approach, the effective management of LED billboards and the resolution of various errors and issues are aimed. The research process consists of three stages. Firstly, the planarized image data of the billboard is processed through calibration to completely remove the background and undergo necessary preprocessing to generate a training dataset. Secondly, the generated dataset is employed to train an object recognition network. This network is composed of a Backbone and a Head. The Backbone employs CSP-Darknet to extract feature maps, while the Head utilizes extracted feature maps as the basis for object detection. Throughout this process, the network is adjusted to align the Confidence score and Intersection over Union (IoU) error, sustaining continuous learning. In the third stage, the created model is employed to automatically detect defective pixels on actual outdoor LED billboards. The proposed method, applied in this paper, yielded results from accredited measurement experiments that achieved 100% detection of defective pixels on real LED billboards. This confirms the improved efficiency in managing and maintaining LED billboards. Such research findings are anticipated to bring about a revolutionary advancement in the management of LED billboards.

• Korean Journal of Optics and Photonics
• /
• v.34 no.4
• /
• pp.139-150
• /
• 2023

Despite various light detection and ranging (LiDAR) architectures, it is very difficult to achieve long-range detection and high resolution in both vertical and horizontal directions with a wide field of view (FOV). The scanning architecture is advantageous for high-performance LiDAR that can attain long-range detection and high resolution for vertical and horizontal directions. However, a large-area photodetector (PD), which is disadvantageous for detection speed, is essentially required to secure the wide FOV. Thus we propose a PD based on the static unitary detector (STUD) technique that can operate multiple small-area PDs as a single large-area PD at a high speed. The InP/InGaAs STUD PIN-PD proposed in this paper is fabricated in various types, ranging from 1,256 ㎛×949 ㎛ using 32 small-area PDs of 1,256 ㎛×19 ㎛. In addition, we measure and analyze the noise and signal characteristics of the LiDAR receiving board, as well as the performance and sensitivity of various types of STUD PDs. Finally, the LiDAR receiving board utilizing the STUD PD is applied to a 3D scanning LiDAR prototype that uses a 1.5-㎛ master oscillator power amplifier laser. This LiDAR precisely detects long-range objects over 50 m away, and acquires high-resolution 3D images of 320 pixels×240 pixels with a diagonal FOV of 32.6 degrees simultaneously.

• The Bulletin of The Korean Astronomical Society
• /
• v.40 no.1
• /
• pp.66.2-66.2
• /
• 2015

In today's age when telecommunications using satellite has become part of our daily lives, one has to be employ preventive measures to avert any possible danger, of which solar activity is the major cause. Coronal mass ejections (CMEs) heading towards the Earth can lead to disturbances in the Earth's magnetosphere, if their magnetic field is oriented southward. Monitoring of solar filaments in this case becomes very very crucial, as their eruption is associated with most of the CMEs. Monitoring of solar filaments in this case becomes very very crucial, as their eruption is associated with most of the CMEs. Also, filaments show activation up to a few hours prior to launch of a CME and thus can provide advance warning. In this study, we present an algorithm for the detection of solar filaments seen in the extreme ultraviolet (EUV) from Atmospheric Imaging Assembly (AIA) on board the Solar Dynamics Observatory (SDO). Various morphological operations are employed to identify and extract the filaments. These filaments are then tracked in order to determine their size and location continuously.

• Journal of Institute of Control, Robotics and Systems
• /
• v.6 no.2
• /
• pp.228-233
• /
• 2000

It is common to apply the technology of FPGA (Fie이 Programmable Gate Array) which is one of the design methods for ASIC(Application Specific IC)to the active components used in the data processing at the digital system of satellite aircraft missile etc for compact lightness and integration of Printed Circuit Board (PCB) In carrying out the digital data processing the FPGAs are designed for the various functions of the Process Control Interrupt Control Clock Generation Error Detection and Correction (EDAC) as the individual module. In this paper an FPGA chip for Single Error Correction and Double Error Detection (SEC-DED) for EDAC is designed and simulated by using a VLSI design software LODECAP.