• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.1
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• pp.71-78
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• 2013

In highly reliable and durable systems, failures due to aging might result in catastrophes. Aging monitoring techniques to prevent catastrophes by predicting such a failure are required. Aging can be monitored by performing a delay test at faster clocks than functional clock in field and checking the current delay state from the test clock frequencies at which the delay test is passed or failed. In this paper, we focus on test clock control scheme for a system-on-chip (SoC) with multiple clock domains. We describe limitations of existing at-speed test clock control methods and present an on-chip faster-than-at-speed test clock control scheme for intra/inter-clock domain test. Experimental results show our simulation results and area analysis. With a simple control scheme, with low area overhead, and without any modification of scan architecture, the proposed method enables faster-than-at-speed test of SoCs with multiple clock domains.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.9
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• pp.1161-1166
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• 1999

Delay testing has become highlighted in the field of digital circuits as the speed and the density of the circuits improve greatly. However, delay faults in sequential circuits cannot be detected easily due to the existence of state registers. To overcome this difficulty a new scan filp-flop is devised which can be used for both stuck-at testing and delay testing. In addition, the new scan flip-flop can be applied to both the existing functional justification method and the newly-developed reverse functional justification method which uses scan flip-flops as storing the second test patterns rather than the first test patterns. Experimental results on ISCAS 89 benchmark circuits show that the number of testable paths can be increased by about 10% on the average.

• ETRI Journal
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• v.25 no.3
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• pp.187-194
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• 2003

Delay testing has become an area of focus in the field of digital circuits as the speed and density of circuits have greatly improved. This paper proposes a new scan flip-flop and test algorithm to overcome some of the problems in delay testing. In the proposed test algorithm, the second test pattern is generated by scan justification, and the first test pattern is processed by functional justification. In the conventional functional justification, it is hard to generate the proper second test pattern because it uses a combinational circuit for the pattern. The proposed scan justification has the advantage of easily generating the second test pattern by direct justification from the scan. To implement our scheme, we devised a new scan in which the slave latch is bypassed by an additional latch to allow the slave to hold its state while a new pattern is scanned in. Experimental results on ISCAS'89 benchmark circuits show that the number of testable paths can be increased by about 45 % over the conventional functional justification.

• Journal of Korean Society of Transportation
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• v.27 no.5
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• pp.179-187
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• 2009

This study develops a real-time signal control algorithm based on sectional travel times and includes a field test and evaluation. The objective function of the signal control algorithm is the equalization of delay of traffic movements, and the main process is calculating dissolved time of the queue and delay using the sectional travel time and detection time of individual vehicles. Then this algorithm calculates the delay variation and a targeted red time and calculates the length of the cycle and phase. A progression factor from the US HCM was applied as a method to consider the effect of coordinating the delay calculation, and this algorithm uses the average delay and detection time of probe vehicles, which were collected during the accumulated cycle for a stabile signal control. As a result of the field test and evaluation through the application of the traffic signal control algorithm on four consecutive intersections at 400m intervals, reduction of delay and an equalization effect of delay against TOD control were confirmed using the standard deviation of delay by traffic movements. This study was conducted to develop a real-time traffic signal control algorithm based on sectional travel time, using general-purpose traffic information detectors. With the current practice of disseminating ubiquitous technology, the aim of this study was a fundamental change of the traffic signal control method.

• International Journal of Highway Engineering
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• v.19 no.3
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• pp.1-10
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• 2017

PURPOSES : This paper focuses on strength development according to the mix design with cement type and mineral admixture from laboratory and field tests in cool weather. METHODS : Two methods evaluated the mix design of concrete pavement in cool weather. Firstly, laboratory tests including slump, air contents, setting time, strength, maturity, and freezing-thawing test were conducted. Three alternatives were selected based on the tests. Secondly, a field test was conducted and the optimum mix design in cool weather was suggested. RESULTS : It is an evident from the laboratory test that a mix with type III cement showed better performance than the one with type I cement. There was a delay in strength development of a mix with mineral admixture compared to mix design without any mineral admixture. In the field test, type III cement+flyash 20% mix design proved the best performance. CONCLUSIONS : For concrete pavement in cool weather, mix design using type III cement could overcome the strength delay due to mineral admixture. Moreover, it is possible to make sure of durability of pavement. Therefore, strength and durability problems due to cool weather would decrease.

• Proceedings of the IEEK Conference
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• 2000.11c
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• pp.189-192
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• 2000

This paper presents a new DR(Dead Reckoning) algorithm in client-server-based networked virtual environment using network delay estimation. In the algorithm, a new update packet is sent to server (or client) whenever the difference of current real value and tracking value after network delay is larger than threshold. To confirm the proposed algorithm, a test network game was implemented. Through iterative field tests, we knew that this algorithm provides fair service and stability.

• Progress in Superconductivity and Cryogenics
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• v.22 no.3
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• pp.13-19
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• 2020

This study presents the experiment and simulation results on the magnetic field response and electrical stability behaviors of no-insulation (NI) and metal insulation with stainless steel tape (MI-SS) which wound in form of racetrack type coils. First of all, the structural design of the racetrack type bobbin was shown along with its parameters. Then, the current-voltage tests were carried out to measure the critical current of both test coils. Also, the sudden discharging and charging tests were performed in the steady state to estimate the decay field time and magnetic field response, respectively. Finally, the overcurrent tests were conducted in the transient state to investigate the electrical stability of these test coils. Based on the experimental results, the contact surface resistances were calculated and applied to the field coils (FCs) of 10-MW-class second generation high temperature superconducting generator (2G HTSG) used in wind offshore environment. The charging delay time and electrical stability for NI and MI-SS HTS FCs of 10-MW-class 2G HTSG are analyzed by the equivalent circuit model and the key parameters which were obtained from the electromagnetic finite element analysis results.

• ETRI Journal
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• v.19 no.3
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• pp.259-280
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• 1997

This paper briefly explains the configuration of CDMA Mobile System (CMS) test bed. The measured fading and delay results of CDMA signal in Taejon area are shown. In comparison to other cellular systems, there are more parameters in the CDMA systems that affect system performance and capacity. We performed the optimization test of the selected parameters and present the effect of each parameter on the performance. This paper presents the capacity and performance test results of CMS. The capacity test was performed on ETRI site of three sectors in Taejon area. The performance tests include call completion rate, busy hour call attempt, and the delay characteristics of voice.

• Journal of Korean Society for Quality Management
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• v.40 no.3
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• pp.270-277
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• 2012

Purpose: In this paper, storage lifetime of delay system in the fuse of 81MM illuminating projectile is estimated. Methods: Accelerated degradation testings of tungsten delay system using both temperature and humidity stresses were performed, and then delay time increase of the systems were analyzed as degradation data based on distribution-based degradation processes. Results: The estimated storage lifetime of detonator is between 11.8 years and 17.6 years with each stress-life relationship. Conclusion: Comparing with field data, storage lifetime of 90% reliability is about 12 years.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.5
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• pp.830-838
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• 2000

This paper represents measurement prodcedure and analysis of terrestrial DTV field test results over Taejeon city area. Thirty three points were selected as measuring points. Signal power, noise power, Segment Error Rate, RMS delay spread and equalizer performance was measured. The video and audio quality of DTV was good over half of test sites. Equalizer, could correct signal ghost and improve S/N up to 13.7 dB. From this test, the test procedure for DTV will be estabilished.