• Title/Summary/Keyword: defect engineering

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Design of Chattering Free Sliding Mode Controller for AUV (무인 수중 잠수정을 위한 채터링이 없는 슬라이딩 모드 제어기 설계)

  • Kim, Hyoung-Joo;Choi, Yoon-Ho;Park, Jin-Bae
    • Proceedings of the KIEE Conference
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    • 2006.07d
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    • pp.1850-1851
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    • 2006
  • The sliding mode control is acceptable for Autonomous Underwater Vehicle(AUV), since the dynamics of AUV are highly nonlinear and have several parameter uncertainty such as the added mass terms, the hydrodynamic coefficients. The sliding mode control can deal well with nonlinearity of the system and offers a robustness to controller with parameter uncertainty. Since sliding mode control has the defect of chattering problem, only in ideal case the actuator can respond by control law. Therefore we propose the sliding mode control with non-chattering. And computer simulations illustrate the performance of the proposed controller.

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Developing Track Ballast Characteristic Guideline In Order To Evaluate Its Performance

  • Sadeghi, J.M.;Zakeri, J. Ali;Najar, M. Emad Motieyan
    • International Journal of Railway
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    • v.9 no.2
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    • pp.27-35
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    • 2016
  • In spite of recent advances in ballasted railway track, the correct choice of ballast for rail track is still considered critical because aggregates progressively deteriorate under traffic loading and environmental exposures. Various ballast requirements, functions and duties have been defined by researchers, railway companies and countries' regulations even though it needs to be integrated to make following proper decision during track operation and maintenance. A proper understanding of ballast properties and suitable tests are prerequisites for minimizing maintenance costs. This paper presents a capable classification for ballast characteristics which need to be investigated beforehand to such a way, firstly to assign ballast functions, secondly need to clarify ballast requirements, thirdly to map appropriate tests to evaluate ballast characteristics and then it must be such that if ballast cannot carry out one of these duties, be able to call there is ballast defect. The paper is structured in order to achieve these objectives.

Molecular Dynamics Simulation of Friction and Wear Behavior Between Carbon and Copper (탄소와 구리의 마찰 및 마모에 관한 분자 동역학 시뮬레이션)

  • Kim Kwang-Seop;Kang Ji-Hoon;Kim Kyung-Woong
    • Tribology and Lubricants
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    • v.20 no.2
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    • pp.102-108
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    • 2004
  • In this paper, friction and wear behaviors between monocrystalline, defect-free copper and carbon on the atomic scale are investigated by using 2-dimensional molecular dynamics simulation. It is assumed that all interatomic forces are given by Morse potential. The deformation of carbon is assumed to be neglected and vacuum condition is also assumed. Average friction and normal forces for various surface conditions, various scratch speeds and scratch depths are obtained from simulations. Changes of wear behaviors for various scratch speeds and surface conditions are investigated by observing snapshots in scratch process. The effects of surface conditions, scratch speeds, and scratch depths on the friction force, normal force, and friction coefficient are also investigated.

A Study for Accelerated Life Testing and Failure Analysis of Chip Varistor (Varistor의 ALT(Accelerated Life Testing) 설계 및 주 고장모드 분석)

  • Chang Woo-Sung;Lee Jun-Hyuk;Lee Kwan-Hun;Oh Young-Hwan
    • Journal of Applied Reliability
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    • v.5 no.2
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    • pp.221-239
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    • 2005
  • General chip SMD parts(chip resistance, chip capacitor, chip varistor etc.) are very wide used electronics parts for IT units. But, failure modes are indistinct for these chip parts. In factory and field the failure modes are recognized to accidental failure mode caused by potential defect. In this paper used chip varistor ALT(Accelerate Life Test) test for verify general failure modes in chip SMD parts. Also the results are useful for general chip SMD ALT tests.

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고주파 표면경화에 의한 피로강도 특성과 예측에 관한 연구

  • Song, Sam-Hong;Choi, Byoug-Ho
    • Journal of the Korean Society for Precision Engineering
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    • v.18 no.9
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    • pp.122-130
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    • 2001
  • Induction surface hardening is widely used to enhance local strength and hardness. However, most research is only to have a focus on fatigue life and fatigue behavior is not so much studied. So, in this study, Cr-Mo steel alloy(SCM440) was used to show the effect of residual stress and micro hole on the fatigue strength fur base metal and induction surface hardened specimen. In addition, the fatigue characteristic between surface hardened and fully hardened steel is somewhat different. It is caused by hardness distribution, residual stress and inclusions etc.. The modification of prediction equation of fatigue strength is proposed and predicted results show very good accuracy. A $textsc{k}$, which is calculated 1.46, is introduced to consider the effect of stationary crack with defect. A new method of modifying residual stress is proposed to examine the mean stress effect under fatigue loading.

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Characteristics of Phosphors for PDP with Frit Contents (Frit 첨가량에 따른 PDP용 형광체의 특성 연구)

  • Jung, Ah-Reum;Kim, Hyeong-Jun;Choi, Sung-Churl
    • Journal of the Korean Ceramic Society
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    • v.47 no.2
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    • pp.146-150
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    • 2010
  • Because the plasma display panel has used red, green and blue(RGB) phosphors, it has suffer from two intrinsic problems; 1) the cell defect due to the lack of binding force between phosphor particles and 2) mis-discharge because of difference of electrical characteristics among RGB phosphors. In order to control the mechanical and electrical properties of RGB phosphors, frit with $ZnOB_2O_3-SiO_2-Al_2O_3$ system was added to RGB phosphor as sintering additive. The mechanical properties were increased by the amount of frit. The amount of frit under 5 wt% rarely affected dielectric constant. However, there was the limit of amount because of decreasing optical properties seriously; over 3 wt% in red, over 10 wt% in green and blue.

Bias stress effect in organic thin-film transistors with cross-linked PVA gate dielectric and its reduction method using $SiO_2$ blocking layer

  • Park, Dong-Wook;Lee, Cheon-An;Jung, Keum-Dong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.445-448
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    • 2006
  • Bias stress effect in pentacene organic thin-flim transistors with cross-linked PVA gate dielectric is analyzed. For negative gate bias stress, positive threshold voltage shift is observed. The injected charges from the gate electrode to the defect states of gate dielectric are regarded as the main origin of $V_T$ shift. The reduced bias stress effect using $SiO_2$ blocking layer confirms the assumed mechanism. It is also demonstrated that the inverter with $SiO_2$ blocking layer shows the negligible hysteresis owing to the reduced bias stress effect.

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The Improvement of Weldline and Flow mark Defection by using Injection Molding Analysis (사출성형 해석을 통한 Weldline 및 Flow mark 개선사례)

  • Lee, Yeong Chang
    • Journal of the Korean Society for Precision Engineering
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    • v.30 no.12
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    • pp.1295-1301
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    • 2013
  • The cause of flow mark defect is known as non-uniform temperature of mold surface when the flow front meets the cold cavity. The exact definition and classification of Flow mark is not clear because the mechanism of flow mark is not figured out till now. Any injection molding analysis software can not predict the flow mark phenomena. To solve weldline and flow mark defects, the gate thickness is reduced to increase the melt front velocity and the melt front velocity of the flow mark area is increased from 82.3mm/s to 104.7mm/s. In addition, the bulk temperature of the flow mark area is increased from $178.3^{\circ}C$to $215.2^{\circ}C$ by adding a cold slug well. The flow mark phenomena can be greatly reduced by increasing the flow front velocity and elevating the bulk temperature.

Slotted Implantable Patch Antenna for ISM Band Application and Its Usage in WiMAX with an I-Shaped Defected Ground Structure

  • Ayubi, Adil Al;Sukhija, Shikha;Sarin, Rakesh Kumar
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.6
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    • pp.359-363
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    • 2017
  • A slotted implantable patch antenna with microstrip feeding is proposed for industrial, scientific, and medical band applications. The result is verified by implanting the antenna in animal tissue. Further, by varying the ground width and introducing a defect into the ground structure, the antenna becomes applicable for worldwide interoperability for microwave access operations. A simulation is performed using Empire XCcel software. An Agilent vector network analyzer is used for analyzing the return loss performance. Simulated and measured results are compared. Antennas with and without defected ground structure both have key advantages including low profile, desirable return loss, good impedance matching and required bandwidth.

Defect Signal Analysis of Steam Generator Tube in NPP Using ECT Array Probe (ECT Array Probe를 이용한 원전 SG세관의 결함 신호해석)

  • Lim, Geon-Gyu;Kim, Ji-Ho;Lee, Hyang-Beom
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.772-773
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    • 2008
  • 본 논문에서는 ECT Array Probe를 이용한 원자력 발전소의 SG세관의 결함 신호를 해석하였다. 프로브의 전자기적 특성을 해석하기 위하여 맥스웰 방정식을 이용하여 지배방정식을 유도하였고, 3차원 유한요소법을 이용하여 전자기 수치 해석을 수행하였다. 신호해석을 위해 사용된 결함의 종류는 FBH결함이며, 결함의 깊이는 세관 두께의 40[%] 및 100[%]로 하였다. 시험주파수는 300[kHz], 400[kHz]를 사용하였으며, 각각의 시험주파수에 대한 결과를 비교 분석하였다. 해석결과 결함부위에서 신호의 증가를 확인할 수 있었으며, 주파수 시험변화시 300[kHz]보다 400[kHz]일때 결함 신호가 증가하는 것을 확인할 수 있었다. 또한 획득한 신호를 ASME 표준 시험편을 이용한 ECT Array Probe의 와전류탐상 실험신호와 비교하였다. 본 논문의 결과는 ECT Array Probe를 이용하여 원전 SG세관 검사시 결함신호해석에 도움이 될 것으로 사료된다.

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